saardrimer writes: ‘boldport flow’ is a web-based tool that allows you to easily generate a build environment for your FPGA projects and run them on your machine. At its current form, it’s a Makefile generator with a web-based front end (now supporting Xilinx, FPGAs, and Linux). The “theory” behind the structure boldport uses is […]
Tag Archives: FPGA
Free Xilinx FPGA seminar
bearmos tipped us to a Free Xilinx FPGA seminar. These seminars often feel like a time-share sales pitch, but if you can stand it, or you’re a starving student, there’s usually lots of free hardware and food. We always take a netbook so we can start hacking right away if they hand out the goods […]
99 dollar PCI-E FPGA kit
riktw tipped us to a LatticeECP3 Versa development kit: i got this in a lattice newsletter per e-mail today. a big PCB with a big FPGA and a fast PCI-E connection for just 99 dollars. after some googeling i found the quickstart PDF from it, it looks like good value for money but not for […]
Altera releases new Quartus II v11.0 with Qsys
Quartus II is Altera’s comprehensive IDE for system-on-a-programmable-chip (SOPC) design, including CPLD and FPGA development tools. They have just released their new Quartus II Software v11.0. The free downloadable web edition includes the Qsys system integration tool in production release, promises up to 2X higher interconnect performance compared to SOPC Builder, improved design reuse and […]
Avnet Spartan-6 LX9 MicroBoard
In a recent comment, Zooboo informed us of the Spartan®-6 FPGA LX9 MicroBoard. Produced as a joint venture between Xilinx and Avnet, the MicroBoard includes a Spartan-6 XC6SLX9-2CSG324C FPGA, 64 MB LPDDR SDRAM, 128 Mb Multi-I/O SPI Flash, 10/100 Ethernet PHY, USB-to-UART port, on-board USB, JTAG circuitry, single-chip 3-rail power with Power Good indicator. It’s […]
Altera breaks industry record for most transistors on an IC
Altera today issued a press release announcing that it set an industry milestone in semiconductor technology by delivering the most transistors ever packed onto an integrated circuit. Altera’s 28-nm Stratix® V FPGAs are the semiconductor industry’s first devices to feature 3.9 billion transistors. “Altera surpassed the known record for transistors when it taped out Stratix […]
Bitbang ethernet from a FPGA
Here’s another bitbanged ethernet transmitter. In this design the ethernet packet is bitbanged directly from the pins of a FPGA. Simple Verilog source is available. Via the forum.
Logic Sniffer: Windows GUI upgrade utility
dogsbody released a new version of his Windows GUI upgrade utility for the Logic Sniffer. Get a Logic Sniffer for $50, with free worldwide shipping.
Logic Sniffer: Updated VHDL code and continous sampling mode
While we all followed dogsbody’s work on the new Verilog Demon Core for the Logic Sniffer, kinsa cleaned up the old VHDL core: New SPI code, works with the latest PIC firmware (v3.0) Working Metadata command New RLE code; n bit counters for n bit data width (except for 24 bits). Additional compression for cases […]
Logic Sniffer: Demon Core v3.07 and firmware updates
Dogsbody released Demon Core v3.07 for the Logic Sniffer with the following fixes: Fixes problem with demux DDR captures causing bogus glitches Fixes missed samples when armed. Ensures the finish-now command works cleanly Minor tweaks to the adv-trigger. A full spec Note: Please be sure to use Jawi’s 0.9.3 release (or newer)! We released an […]
Week in (p)review: February 20, 2011
Don’t forget to share your current project in the comments or the forum. This week our favorite project gets a free SOIC protoboard. Here’s a summary of major developments over the last week: A new firmware and PC application to program CPLDs and FPGAs with the Bus Pirate MOD for the phpBB3 forum stops almost […]
Logic Sniffer: Demon Core v6
Dogsbody released v6 of the Verilog core for the Logic Sniffer, codename “Demon Core”. Try it with Jawi’s latest 0.9.3.1 client software: Feb 8 Edit: Release6. Removed inclusive-RLE mode, since breaks older clients and is no longer used by Jawi’s. Also fixed 24-bit RLE counts. Note: Please be sure to use Jawi’s 0.9.3 release (or […]
Logic Sniffer: Windows GUI upgrade utility
dogsbody released a new version of his Windows GUI upgrade utility for the Logic Sniffer. It now upgrades both the PIC microcontroller an the FPGA ROM chip: I’ve updated my Windows GUI OLS loader to support programming PIC firmware. There are no extra knobs or buttons needed. Just select an image file, and the loader […]
Week in (p)review: January 30, 2011
Don’t forget to share your current project in the comments or the forum. This week our favorite project gets a free SOIC protoboard. Here’s a summary of major developments over the last week: The new forum is running, we hope you enjoy the added features of the phpBB software. It was a bit of a […]
How-to use OLS to debug fpga
Jack Gassett put together a series of videos, at The Gadget Factory demonstrating how to debug the internal logic of an fpga using the open workbench logic sniffer. “When I was debugging the UART communications last week I discovered a new way to debug internal FPGA logic. I put together a screencast for those who […]
OpenSPARC on FPGA
In March 2006, the complete design of Sun Microsystems’ UltraSPARC T1 microprocessor was released in open source form, named OpenSPARC T1. In early 2008, its successor, OpenSPARC T2, was also released in open source form. These were the first (and still only) 64-bit microprocessors ever open sourced. They were also the first (and still only) […]
Microsemi FPGA named product of the year
Hearst Publications’ “Electronic Products” Magazine presented their 2011 Product of the Year Award to Microsemi for their SmartFusion Intelligent Mixed Signal FPGAs. Microsemi Corporation (formerly known as Actel) manufactures the SmartFusion family of intelligent mixed signal FPGAs. The SmartFusion line integrates an FPGA, ARM® Cortex™-M3, and programmable analog, offering full customization and IP protection. A […]
Altera CPLD/FPGA Quartus II design tutorials
If you have an Altera development board, such as the MAX V CPLD board or the UP1, UP2 or DE series of board, Altera has a collection of free video tutorials covering many aspects of CPLD/FPGA circuit design and programming of devices using their Quartus II design software.
Xilinx free FPGA/CPLD design tutorials
The Arduino platform and bare microcontrollers are good ways to get started in developing embedded systems. But the way of the future is clearly CPLD and FPGA architecture. These devices are not simply a new type of chip, but a new and interesting design and development frontier. Their programs are developed using several methods, including […]
PLUNIFY: programmable logic design simplified
A new site allows you to conduct programmable logic design with Xilinx and Altera devices “in the cloud.” PLUNIFY, currently in Beta, allows you to experiment with PLD development in your web browser without downloading any software. A free account is available allowing you to 1 GB of storage space and free online development tools […]