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Posts Tagged ‘VHDL’

Lattice iCE40 Ultra Plus FPGA: Gnarly Grey Upduino – Tutorial 1: The basics

Tuesday, September 4th, 2018

A how-to getting an LED flashing using VHDL from Harris' Electronics: The cheap price however comes with a few niggles, namely getting it up and running in the first place with the limited documentation. Gnarly Grey do a great job of explaining programming a starting program but don’t say much...

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Posted in Arduino, FPGA | 1 Comment »

Designing a CPU in VHDL

Saturday, October 31st, 2015

A detailed guide on designing a CPU in VHDL by Domipheus: This is part of a series of posts detailing the steps and learning undertaken to design and implement a CPU in VHDL. Previous parts are available here, and I’d recommend they are read before continuing. Part 10 was supposed to...

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Posted in FPGA | No Comments »

NandLand – FPGA info and tutorial site

Tuesday, May 20th, 2014

Russell is interested in working with FPGAs. He's developed an educational website: www.nandland.com. "It's an educational website for people interested in learning about FPGAs and ASICs, mostly by focusing on VHDL and Verilog tutorials and examples. I have written all of the content on it myself and I'm adding new...

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Posted in code, FPGA, site, tutorials | No Comments »

Free digital design text book: Digital McLogic design

Thursday, June 6th, 2013

We previously covered the Free VHDL book.  Now Viswa tipped us to this Free digital design text book : Digital McLogic Design This text presents introductory digital logic design concepts and introductory VHDL modeling concepts. This book focuses on block-level design and has removed many of the unimportant low-level digital...

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Posted in ebook | 3 Comments »

VHDL tutorial using Xilinx CPLD

Sunday, February 3rd, 2013

We're always looking for good information on programmable logic devices, projects and tutorials. In our quest we discovered this tutorial on VHDL programming by the crew from StartingElectronics. The course is geared toward beginneers and provides a good introduction to the VHDL language through a series of tutorials that demonstrate...

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Posted in CPLD, FPGA, site, tutorials | 2 Comments »

Free Model Foundry: open source CPLD/FPGA simulation models

Friday, March 16th, 2012

Here's a site we found containing open source simulation models for system level verification of CPLD/FPGA devices. "Founded in 1995, Free Model Foundry (FMF) is dedicated to promoting standard modeling practices within the electrical engineering comunity. In particular, we support the use of VHDL, Verilog, and SystemVerilog modeling languages. They...

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Posted in code, CPLD, documentation, FPGA, open source, site | 2 Comments »

Free ebook on VHDL programing

Monday, February 13th, 2012

Free Range VHDL is a free ebook on VHDL programming. VHDL is a logic simulation and programming language used with FPGAs, and CPLDs. If you want to get started with VHDL here is an inexpensive way to learn the basics and more. Via GadgetFactory.

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Posted in ebook | 2 Comments »

VHDL communication with a PS/ 2 keyboard

Tuesday, January 3rd, 2012

Hamster has written VHDL code for interpreting data from a PS2 keyboard. It's currently a work in progress and is designed to work with his Papilio S6 (the Spartan 6-based Papilio board paired with the Megawing board, both available from Seeedstudio.) The code receives the scancode from a PS2 keyboard...

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Posted in code, CPLD, FPGA | No Comments »

Interface 16×2 LCD with Altera DE1 FPGA in VHDL

Saturday, September 10th, 2011

The Altera DE1 is an educational and development board based on the Cyclone II 2C20 FPGA and is commonly used in college and university courses on digital logic and FPGAs. Kiran writes to inform us of her tutorial on interfacing this board with the 16×2 LCD from Terasic. Kiran writes:Here...

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Posted in code, FPGA, LCD | 3 Comments »

SID player VHDL core

Tuesday, August 9th, 2011

[embed]http://www.youtube.com/watch?v=Ob8jZyfnujM[/embed] d18c7db was inspired by Markus' SID audio file player so he implemented a SID player in VHDL: I spent some time this weekend and got some initial sounds out of my board. I'm using a Papilio FPGA board with a SID core written in VHDL. The sounds coming out...

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Posted in project logs | No Comments »

MCPU – minimal CPU on a CPLD

Sunday, August 7th, 2011

Here's a project from opencores by Tim Boscke known as MCPU. It creates a minimal CPU on a CPLD with at least 32 macrocells (such as our XC9572 CPLD Dev Board with 72 macrocells.) Tim describes: MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD -...

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Posted in code, CPLD, how-to | 1 Comment »

CPLD VGA resistor DAC

Friday, May 6th, 2011

Chris from Pyroelectro informs us of his new tutorial describing the design of a VGA controller that uses a resistor DAC to create 512 unique VGA colors. He uses an Altera CPLD and VHDL code to create all the video signals. The theory, hardware schematics and software are all explained...

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Posted in CPLD, how-to | No Comments »

Create NTSC video output from CPLDs and FPGAs

Saturday, March 19th, 2011

PyroElectro shows how to make NTSC video with a FPGA: NTSC video is a standard that has been around almost as long as black and white TVs. It's a true analog standard, but we can use digital FPGA signals to create NTSC. This tutorial shows you how to output simple...

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Posted in CPLD | No Comments »

VHDL tutorial from UPenn

Sunday, February 20th, 2011

The University of Pennsylvania's Department of Electrical and Systems Engineering presents this tutorial on the VHDL programming language. VHDL is one of the primary languages used to program CPLDs and FPGAs. Once you get your program written, you can load in onto a device with your own Bus Pirate for...

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Posted in CPLD, documentation, FPGA | No Comments »

PLUNIFY: programmable logic design simplified

Saturday, January 15th, 2011

A new site allows you to conduct programmable logic design with Xilinx and Altera devices "in the cloud." PLUNIFY, currently in Beta, allows you to experiment with PLD development in your web browser without downloading any software. A free account is available allowing you to 1 GB of storage space...

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Posted in CPLD, FPGA, site | 3 Comments »

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