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Posts Tagged ‘Verilog’

FPGA : RC Servo and Stepper motor control in Verilog

Wednesday, September 17th, 2014

Trandi blogged about his RC servo and stepper motor project.  He writes: For those interested in reproducing this example: The board is called “EP2C5 Mini Board” and has a EP2C5T144C8 Cyclone II FPGA on it I used a standard, 9grams micro RC Servo I used a 28BYJ-48 stepper motor and it’s...

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Posted in FPGA | 1 Comment »

NandLand – FPGA info and tutorial site

Tuesday, May 20th, 2014

Russell is interested in working with FPGAs. He's developed an educational website: www.nandland.com. "It's an educational website for people interested in learning about FPGAs and ASICs, mostly by focusing on VHDL and Verilog tutorials and examples. I have written all of the content on it myself and I'm adding new...

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Posted in code, FPGA, site, tutorials | No Comments »

Building a CPLD based logic analyzer

Tuesday, January 21st, 2014

Alex from InsideGadgets has been working on a Building a CPLD Based Logic Analyser. In Part I of his post he details his build of a logic analyzer which saves the sample to external SRAM. For this project Alex used the Altera MAXII EPM240 development board with an on board...

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Posted in builds, code, CPLD, how-to, logic analyzer | No Comments »

Hand-tracking Anti Tetris game on DE2 board

Monday, May 27th, 2013

Tian Gao from Cornell's University's EE program developed what he calls an AntiTetris game using the Altera DE2 FPGA board. The project was part of the final requirements in Cornell's ECE 5760 Advanced Microcontroller Design and system-on-chip Spring 2013 course. "In this project, I built a video game "Anti Tetris"...

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Posted in code, FPGA | No Comments »

Homebrew Cray-1A on Xilinx Spartan-3E board

Thursday, March 7th, 2013

Chris Fenton has spent the last year and a half or so constructing his own 1/10-scale, binary-compatible, cycle-accurate Cray-1. He says this project falls purely into the “because I can!” category." The actual design was implemented in a Xilinx Spartan-3E 1600 development board. For vintage computing enthusiasts, Chris also provides...

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Posted in dev boards, FPGA, how-to, vintage | 3 Comments »

Verilog project: Binary to 7-segment display

Sunday, April 1st, 2012

DJ Delorie was looking for an excuse to learn about Verilog and CPLDs. So he coded up this binary to 7-segment display converter. He provides links to the source code and says this project fits into the Xilinx XC9572 (the same chip used in our Coolrunner-II CPLD breakout board. You...

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Posted in code, CPLD, LEDs, open source | 2 Comments »

Free Model Foundry: open source CPLD/FPGA simulation models

Friday, March 16th, 2012

Here's a site we found containing open source simulation models for system level verification of CPLD/FPGA devices. "Founded in 1995, Free Model Foundry (FMF) is dedicated to promoting standard modeling practices within the electrical engineering comunity. In particular, we support the use of VHDL, Verilog, and SystemVerilog modeling languages. They...

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Posted in code, CPLD, documentation, FPGA, open source, site | 2 Comments »

Understanding Verilog warnings

Friday, September 23rd, 2011

Big Mess o’ Wires has a review of Verilog warnings: Those of you who’ve followed the blog for a while know about my many frustrations with Verilog. Because it feels sort of a like a procedural programming language, but very definitely isn’t one, I keep expecting to be far more...

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Posted in documentation | 1 Comment »

MCPU – minimal CPU on a CPLD

Sunday, August 7th, 2011

Here's a project from opencores by Tim Boscke known as MCPU. It creates a minimal CPU on a CPLD with at least 32 macrocells (such as our XC9572 CPLD Dev Board with 72 macrocells.) Tim describes: MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD -...

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Posted in code, CPLD, how-to | 1 Comment »

Verilog model for 24xx1025 EEPROM released

Tuesday, May 31st, 2011

octal writes: Microchip released the Verilog model for 24xx1025 Devices :) a good learning experience Via the forum.

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Posted in software | 1 Comment »

Simple CPLD binary counter project

Monday, April 18th, 2011

FlipThatBit released this video of a simple CPLD binary counter project. This is a good beginner's Verilog project, requiring a minimum number of external components, and providing an immediate visual result of your efforts. This was written for the XC9536XL CPLD on a homemade project board. It should work just...

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Posted in CPLD, LEDs | 1 Comment »

Implementation of UART transmitter in Verilog HDL for Spartan3 FPGA

Monday, February 28th, 2011

If you're experimenting with FPGAs its helpful to know how various common tasks are coded. Here is an article by M. Yasir explaining how to code a UART transmitter in a Spartan 3 FPGA. The tutorial uses the Verilog hardware definition language.

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Posted in documentation, FPGA | 5 Comments »

PLUNIFY: programmable logic design simplified

Saturday, January 15th, 2011

A new site allows you to conduct programmable logic design with Xilinx and Altera devices "in the cloud." PLUNIFY, currently in Beta, allows you to experiment with PLD development in your web browser without downloading any software. A free account is available allowing you to 1 GB of storage space...

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Posted in CPLD, FPGA, site | 3 Comments »

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