Boldport flow: Makefiles for FPGA projects

 

saardrimer writes:

‘boldport flow’ is a web-based tool that allows you to easily generate a build environment for your FPGA projects and run them on your machine. At its current form, it’s a Makefile generator with a web-based front end (now supporting Xilinx, FPGAs, and Linux).

The “theory” behind the structure boldport uses is defined here which may be useful even if you don’t use boldport.

I’m seeking early adopters and honest feedback (that is, good and bad), which go a long way at this early stage. I’m also happy to work with projects in order for them to use the ‘boldport flow’, and allow me to improve the tool.

Via the forum.

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1 Comment

  1. Dear sir/madam,

    I am looking for the vhdl / verilog coding for 32- bit processor having 4 – pipeline structure in it with its source code.

    then to be implemented on FPGA vertex -2/3/4/6

    I wish to integrat the various dynamic power management strategies and them to implement on this processor to have the low power processor.

    see if you can do some favor in this line.

    pl. let me know your stand.

    then afterward we will discuss the other specifications.

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