Here’s an example of FPGAs being used in a serious application: high-frequency trading (HFT), the execution of computerized stock trading strategies. The device pictured above is the HFT-X Development Kit by Stone Ridge Technology. Under the hood this device sports one Xilinx PCIe Bridge FPGA, one Xilinx Virtex-5 Processing FPGA, 2GB DDR2 SDRAM, 1G, 10G, […]
Category Archives: FPGA
Xilinx free CPLD/FPGA design handbook
Xilinx has a helpful free publication, the Programmable Logic Design handbook. This quick start guide introduces their line of CPLD and FPGA devices and the basic steps to program development using their ISE Webpack. A listing of application notes and reference designs is included. Download your own copy of this 144 page PDF.
Xilinx: Zynq-7000 extensible processing platform
Drone writes: Xilinx releases the Zynq-7000 Extensible Processing Platform. Essentially, Zynq is a dual-core ARM A9 Cortex micro-controller surrounded by 28nm FPGA goodness on-die. There are generous amounts of hardware GPIO, serial ports, and both sync and async memory controllers. DMA is supported. Thanks Drone! Via the contact form.
Implementation of UART transmitter in Verilog HDL for Spartan3 FPGA
If you’re experimenting with FPGAs its helpful to know how various common tasks are coded. Here is an article by M. Yasir explaining how to code a UART transmitter in a Spartan 3 FPGA. The tutorial uses the Verilog hardware definition language.
XSVF specification document
We’ve referred to various file formats for programming CPLDs and FPGAs in recent posts. One is the Serial Vector Format (SVF), an industry standard file format that is used to describe JTAG chain operations in a compact, portable fashion. Its specifications are fully described in this 26 page PDF produced by Texas Instruments. To provide […]
VHDL tutorial from UPenn
The University of Pennsylvania’s Department of Electrical and Systems Engineering presents this tutorial on the VHDL programming language. VHDL is one of the primary languages used to program CPLDs and FPGAs. Once you get your program written, you can load in onto a device with your own Bus Pirate for $30, including world-wide shipping. Also […]
XESS XuLA-200 FPGA/uC board
XESS introduces their new XuLA-200 breakout board. The XuLA Board packs a 200,000-gate FPGA and a supervisory microcontroller into a 2″ x 1″ footprint (51 mm x 25 mm). XESS is committed to a completely open source design for this board which features a Xilinx XC3S200A Spartan 3A FPGA with 8 MByte SDRAM, 2 Mbit […]
NEW APP: Bus Pirate CPLD/FPGA programmer
It’s easier to program CPLDs and FPGAs from the Bus Pirate with a new firmware and PC application. The Bus Pirate has done JTAG with OpenOCD for a long time. OpenOCD is usually overkill for a simple CPLD or FPGA project though, and many find it difficult to get started. Clear back in Bus Pirate […]
Logic Sniffer: Demon Core v6
Dogsbody released v6 of the Verilog core for the Logic Sniffer, codename “Demon Core”. Try it with Jawi’s latest 0.9.3.1 client software: Feb 8 Edit: Release6. Removed inclusive-RLE mode, since breaks older clients and is no longer used by Jawi’s. Also fixed 24-bit RLE counts. Note: Please be sure to use Jawi’s 0.9.3 release (or […]
MIT OpenCourseWare: Introductory Digital Systems Laboratory
MIT has a program known as OpenCourseWare designed to provide free access to course materials from previously presented MIT courses. Course offerings from all academic disciplines are available and the list grows periodically. MIT OCW even has their own YouTube channel. Here’s an interesting offering, Introductory Digital Systems Laboratory, covering topics related to CPLD/FPGA program […]
How-to use OLS to debug fpga
Jack Gassett put together a series of videos, at The Gadget Factory demonstrating how to debug the internal logic of an fpga using the open workbench logic sniffer. “When I was debugging the UART communications last week I discovered a new way to debug internal FPGA logic. I put together a screencast for those who […]
All new Logic Sniffer FPGA core
dogsbody rewrote the entire Logic Sniffer FPGA core in Verilog and added nearly all the features of a HP 16550A workbench logic analyzer. Check it out: My version of the fpga uses 85% of the slices, keeps the legacy triggers, meets timing easily (at 105Mhz), and adds: Trigger Terms: 10 more 32-bit masked value comparisons. […]
DEFCON 16: hardware trojans using FPGA
At the DEFCON 16 hacker conference, Fouad Kiamilev and Ryan Hoover gave a presentation on the security threat presented by hardware Trojans, extra circuitry illicitly added to hardware during its manufacture. When triggered, the hardware Trojan performs an illicit action such as leaking secret information, allowing attackers clandestine access or control, or disabling or reducing […]
OpenSPARC on FPGA
In March 2006, the complete design of Sun Microsystems’ UltraSPARC T1 microprocessor was released in open source form, named OpenSPARC T1. In early 2008, its successor, OpenSPARC T2, was also released in open source form. These were the first (and still only) 64-bit microprocessors ever open sourced. They were also the first (and still only) […]
Microsemi FPGA named product of the year
Hearst Publications’ “Electronic Products” Magazine presented their 2011 Product of the Year Award to Microsemi for their SmartFusion Intelligent Mixed Signal FPGAs. Microsemi Corporation (formerly known as Actel) manufactures the SmartFusion family of intelligent mixed signal FPGAs. The SmartFusion line integrates an FPGA, ARM® Cortex™-M3, and programmable analog, offering full customization and IP protection. A […]
Altera CPLD/FPGA Quartus II design tutorials
If you have an Altera development board, such as the MAX V CPLD board or the UP1, UP2 or DE series of board, Altera has a collection of free video tutorials covering many aspects of CPLD/FPGA circuit design and programming of devices using their Quartus II design software.
Xilinx free FPGA/CPLD design tutorials
The Arduino platform and bare microcontrollers are good ways to get started in developing embedded systems. But the way of the future is clearly CPLD and FPGA architecture. These devices are not simply a new type of chip, but a new and interesting design and development frontier. Their programs are developed using several methods, including […]
PLUNIFY: programmable logic design simplified
A new site allows you to conduct programmable logic design with Xilinx and Altera devices “in the cloud.” PLUNIFY, currently in Beta, allows you to experiment with PLD development in your web browser without downloading any software. A free account is available allowing you to 1 GB of storage space and free online development tools […]
FPGAs and Apples
One area of FPGA development involves the emulation of retro computers. AppleLogic is a site for hobbyists who develop FPGA cores of early Apple Computer models. Their collection of early Apple user manuals, schematics and documentation is quite impressive.
When FPGAs attack hashes
What could you do with an array of 15 FPGAs? Why not attack hashes! NSA@home is a fast FPGA-based SHA-1 and MD5 bruteforce cracker. It is capable of searching the full 8-character keyspace (from a 64-character set) in about a day in the current configuration for 800 hashes concurrently, using about 240W of power. The […]