Implementation of UART transmitter in Verilog HDL for Spartan3 FPGA

If you’re experimenting with FPGAs its helpful to know how various common tasks are coded. Here is an article by M. Yasir explaining how to code a UART transmitter in a Spartan 3 FPGA. The tutorial uses the Verilog hardware definition language.

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5 Comments

  1. Hi,this code is implemented by me and is given on my blog.I am trying to implement the receiver of UART as well,but finding it a little bit difficult… could somebody recommend me some useful links in this regard

    regards
    m.yasir

  2. Well, if you go to the link I supplied above you will find a very clean implementation of both an RS232 transmitter and receiver, although the receiver only use 8 time over sampling rather than the normal 16 times.

  3. i m doing my mtech so for mini project i want to do it on fpga like uwart implementation on fpga and sram implementation on fpga so please kindly contact me on my id and please kindly provide me the neccessary material if anyone have,,, will be thankfull to you

    1. i am doing mtech so for mini project i want to implement UART on FPGA using verilog code please help me to get that code and contact me on my mail id . please if possible send me some necessary material

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