Dangerous Prototypes

A new 16 channel version of the Saleae Logic is out. In addition to double the channels of the Saleae 8bit analyzer, the new version supports capture up to 100MHz (2 channels only) and has better buffering. We really like the Saleae 8bit analyzer and use it in the lab.

The Saleae is a streaming data logger type logic analyzer. It pushes samples to USB as fast as it can, and can take “unlimited” samples. Too many things sharing USB, or too much system activity, and the maximum capture rates will fail. It has a small buffer, but it heavily depends on USB bandwidth.

This is different than the topology of the Logic Sniffer. It stores samples to internal RAM and then dumps them when the capture is complete. The Logic Sniffer approach is limited to internal memory but can capture the maximum rate for all channels. The Saleae approach has a lot more samples, but the channels decrease with speed, and maximum speed depends on system and USB activity.

Justin writes in the comments:

Our fault! Sorry about the mistake.

We’ve worked on a lot of different logic analyzers, so we’re always interested on someone else’s approach. This picture of the internals of the new Saleae look a lot like the Logic Sniffer. It uses a similar LVC(H)16T245 buffer, and a FPGA. We assume it’s the same 100pin Spartan3 FPGA on the Logic Sniffer because that is the only Xilinx FPGA family that has a 100pin TQFP package.

U3 could be a SC-70 flash ROM chip because it is close to the config pins. This could also be a static configuration Spartan that doesn’t use a ROM chip. U3 could also be a regulator because we only see two power supplies, by the round inductors marked L. This chip usually needs 3: 1.2, 2.5, and 3.3volts.

Why the FPGA? The new version is much faster, the FPGA is doing some heavy lifting. We assume it’s used for triggering and buffering. The tech specs mention compression, maybe the FPGA does some form of RLE.

The 8bit Saleae uses a simple Cypress USB chip to take samples and send them to the computer. Unless there are components on the back of the PCB, this version may implement the USB connection in the FPGA instead of using a stand-alone chip. There are a number of  USB cores for FPGAs available, most are expensive and closed source, we haven’t found an open source version yet. It also seems like it would be difficult to upgrade with a FPGA-only design, so maybe there’s still a Cypress USB chip on the back of the board.

Congratulations to Saleae on the new design. You can pick up the 16 channel version for $300, or the 8 channel version for $150. If anyone has one, please drop us a line, we’d like to hear more about the chips on the inside.

Thanks octal! Via the forum.