Dangerous DSO part 3: Messing with the front-end
Yesterday we looked at how the Dangerous DSO analog to digital converter works, and it turns out to be a pain in the butt. It only measures a 1volt (1Vp-p) range between 2volts and 3volts. That’s not a very useful range for an oscilloscope, so we need an analog front-end that transforms the input signal into something the ADC will measure.
Lets set a +/-10volts DC input range goal for our feeble first attempt at a DSO. That’s a 20volt swing from top to bottom(Vp-p). Input to the DSO will be divided by 20 so it has a 1Vp-p range. Then we need to lift it 2 volts into the 2-3volt measurement range of the ADC. Some gory details below.
Dangerous DSO is a new logic analyzer/oscilloscope design we’ve been using in the lab. This is not a finished project, it will not be produced. We’re posting our current progress to get some feedback. Look for a new Dangerous DSO article every day this week. Don’t miss Part 1: There’s so much between 0 and 1, and Part 2: Feed and water your ADC.
The Bitscope logic analyzer/oscilloscope was originally an all through-hole project in Circuit Cellar magazine. A CPLD drives two 32Kx8 SRAM chips that store 8 channels of logic and 8bits from a flash ADC chip. Sound familiar? Top capture speed is 50million samples per second.
Fascination with the Bitscope is the reason Dangerous Prototypes exists today. Our first open source logic analyzers cloned the Bitscope protocol instead of SUMP. We’ve been building bits and pieces of it for years. In short, a Bitscope clone has been a long term goal. But enough gushing, more thieving.
We dug through the Bitscope design to see how they handled the ADC input. Just the minimum circuit to get a ground-centered voltage into the ADC. The Bitscope ADC buffer is exactly what we need. An op-amp lifts a 1.2Vp-p signal to a range the ADC can use. It’s adjustable and works with different ADCs, including a few with the same specs as the ADS830 we’re using. It has 1.667 gain by default, but we can deal with that later.
To get 1Vp-p from +/-10volt input, a swing of 20Vp-p, we need to divide the input by 20. We used a 1Mohm trimmer resistor (R12) so we can adjust the input range. 1Mohm places a very small load on the circuit it connects to, but shouldn’t change the signal too much. Instrumentation quality isn’t a goal, we’re just prototyping.
We used a standard probe connector, but a banana plug might be better. Who has o-scope probe cables? Everyone has a multimeter cable, and it’s cheaper. C44 and C33 are for filter caps, if we ever get around to trying them.
Now we’ve got a +/- 10 volt signal divided down to +/-0.5volts. We still need to move it up to the 2-3volt range the ADC measures. Next up, a trip to the op-amp.
There’s no easy way around it, this project needs an op-amp. It’s gonna be confusing, and probably expensive. Our understanding might even be wrong, don’t use this to study for an exam.
An op-amp does two things we so desperately need. It can recenter the input signal from ground to 2.5volts. After the 1Mohm divider the signal is pretty weak, the op-amp adds some kick so it has enough power to drive the ADC.
We used the Bitscope ADC buffer verbatim, but removed the over-voltage protection diodes. The op-amp needs a +/-5volt supply. The negative voltage comes from a TCM828 inverter that just needs a few capacitors. USB isn’t always 5volts, it’s probably best to use the external power supply if a clean 5volt reference matters.
Input from voltage divider (R12) drives the op-amp’s non-inverting input (+). The inverting input (-) connects to an adjustable negative voltage created by R8 and T1. C3,4,5,20 are filters.
An op-amp lives to keep the the voltage on both input pins equal, it tries to do this by changing the output voltage. If the input on the + pin goes up 0.1volts, the op-amp increases the output voltage until the other input (-) goes up 0.1volts too.
R33 and R44 are key. They form a voltage divider between the op-amp output and the – input. We can manipulate this divider to change the output. If the voltage on the – input is half the output, then the output has to increase twice as much to equalize the + and – pins when + changes. 0.1volts increase on the + pin causes a 0.2volts increase in output to compensate on the – pin. This is gain. Or at least how we understand it. The Bitscope circuit has 1.667 gain, but we’ll play with that more tomorrow in simulations.
Back to the task at hand, shifting our ground to 2.5volt for the ADC. The adjustable negative supply connected to the inverting input forces the op-amp to shift the output to compensate. The center point can be set by changing the negative supply with R8. We used a single turn pot and it doesn’t give nearly enough room for fine adjustment.
Choosing an op-amp
Not just any op-amp will do, it has to be high speed and low distortion. You might notice some flywire rework on the op-amp. We’re testing lots of op-amps and they aren’t all pin-compatible.
The MAX477 used in the Bitscope design is discontinued. We looked for op-amps in current production with similar values: 300MHz -3dB bandwidth (at 1Vp-p if specified) and 1100V/µs slew rate. There are other factors to consider, but this helps narrow down the candidates.
MAX4450 is a recommended replacement, but the specs aren’t as nice (210MHz -3dB bandwidth, 485V/µs slew rate). An SOT-23 version is available at Digikey for $1.20, but we sampled the SOIC version for prototyping.
Summing it up
Now we have an analog front-end. A trimmer resistor divides the input signal down to 1Vp-p. The op-amp re-centers the signal at 2.5volts so we can measure it with the ADC. Both input range and the ground center can be adjusted.
Still to come
Next time we’ll simulate the design in LT-SPICE. It makes a lot more sense when you see it happen on a pretty graph.
Don’t missDevelopment, FPGA, oscilloscope, Prototypes and tagged Bitclone, Bitscope, DSO, o-scope, op-amp.