Alex connected up an salvaged laptop LCD to his Papilio Plus FPGA development board. He is designing a pair of boards for easier interface, one is designed as a wing for the dev board, and the other as a breakout for the LCD. They’ll be connected together via an HDMI cable, even though the protocol […]
Category Archives: FPGA
Precise control of DC motors using an FPGA
Chris wrote extensive documentation on how to implement precise control of DC motors using FPGAs. The goal of this project is to build a simple one input, one output system that will control a motor. The control input will come from a trimpot and the FPGA or CPLD’s job will be to use the input […]
LatticeSemi offers discounted FPGA dev boards
Lattice Semi is offering the iCEblink40 Evaluation Kits for $19 for a limited time. The iCEblink40 boards feature the ultra low density iCE40 FPGA and come in two versions, the iCEblink40-HX1K and the iCEblink40-LP1K Evaluation Kits which differ in the number of I/O pins. Both boards offer 1280 logic look up tables and 64K bits […]
Tutorial: Nut/OS on Altera FPGA
Michael Fischer of emb4fun has a new tutorial on using Nut/OS on Altera FPGAs. His design uses the Altera DE0-Nano board and a self-made adapter equipped with a DM9000E-H board, and includes a short example for an Internet Radio. Michael’s tutorial is divided into three parts linked below: Part 1, Part 2, and Part 3. […]
Pipistrello: Spartan 6 development board with 64MB of RAM, High Speed USB, and HDMI
Magnusk designed the Pipistello Spartan 6 development board with the same IO headers as the Papilio One. It features 64MB of RAM running at 200Mhz, the FDTI FT2232H High Speed USB IC, HDMI output, and a micro-SD card holder. So the only option left was to make my own board – basically merging the FPGA […]
AltOR32: An OpenRISC CPU for small FPGAs
Ultra-Embedded designed a soft core 32bit openRISC CPU with basic ISA functionality for small FPGAs. It fits on the Spartan 3 featured on the Papilio One 250k development board, and comes in pipelined and multi-cycle versions. AltOR32 is an OpenRISC 1000 architecture derived RISC CPU targeted at small FPGAs and contains only the most basic […]
Free webinar: FPGA programming in C code
Newark/element14 and David Pellerin, co-founder of Impulse Accelerated Technologies, have teamed up to offer a free webinar on programming in C code on an FPGA using the Altera Cyclone development platform. They promise, “In 45 minutes you will learn how you can leverage distributed processing for a C code algorithm across your entire embedded system […]
ZPUino v1.0 released
ZPUino is a system-on-chip 32bit microprocessor FPGA core, that functions with a modified Arduino IDE. All the files regarding the core are open-source and downloadable from their site, and so is the modified Arduino IDE. Yes, that is true. ZPUino 1.0 is now available for you to use and enjoy. Expect some updates on next […]
Free Model Foundry: open source CPLD/FPGA simulation models
Here’s a site we found containing open source simulation models for system level verification of CPLD/FPGA devices. “Founded in 1995, Free Model Foundry (FMF) is dedicated to promoting standard modeling practices within the electrical engineering comunity. In particular, we support the use of VHDL, Verilog, and SystemVerilog modeling languages. They believe in free, open source […]
Hacking the FPGA bitstream
Squok writes referring us to several documents he’s found regarding hacking the bitstream in secure FPGAs: In order to protect the intellectual property and to prevent fraud, e.g., by cloning an FPGA or manipulating its content, many current FPGAs employ a bitstream encryption feature, which is advertised by manufacturers as “making it virtually impossible for […]
Online course for Altera’s SignalTapII logic analyser simulator for FPGAs
In a previous post we wrote about Kiran’s review of Altera’s SignalTapII logic analyzer simulator for FPGAs. Jason let us know that Altera provides many free online courses for their tools, and one of them is for the SignalTapII. The course covers the following: Add one or more instances of the SignalTap II logic analyzer […]
Xilinx free online Xcell Journal
Xilinx has released Issue 78 of Xcell Journal, their free online publication for embedded system and programmable logic developers. Each issue of Xcell has articles targeted at developers from every skill level, from beginner to expert. You can check out individual articles from this issue or download past issues back to 1988 at the Xilinx […]
Xilinx ISE Design Suite v 13.4 now available
Xilinx has announced the availability of Version 13.4 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This release introduces their new MicroBlaze Micro Controller System (MCS), making a MicroBlaze-based processing system available in the ISE WebPACK edition. This is the software […]
VHDL communication with a PS/ 2 keyboard
Hamster has written VHDL code for interpreting data from a PS2 keyboard. It’s currently a work in progress and is designed to work with his Papilio S6 (the Spartan 6-based Papilio board paired with the Megawing board, both available from Seeedstudio.) The code receives the scancode from a PS2 keyboard attached to Port A of […]
ALSE free IP cores for non-commercial CPLD/FPGA dev
Advanced Logic Synthesis for Electronics (ALSE) is a Paris based company providing product development, IP consulting and training courses involving HDL, ASIC and FGPA devices. They are making available a series of IP cores free for personal, non-commercial use. They state: For non-commercial projects only, we have taken the decision to offer some functions for […]
DE0 Nano intro programming tutorial
Chris from PyroElectro has written an intro tutorial on programming the Altera DE0 Nano FGPA board. His article examines installing Altera’s IDE: Quartus II on your computer and using it to make an FPGA program, compile it and get it onto the DE0 Nano’s Cyclone IV FPGA.
Masochist’s Video Card on a DE0 Nano FPGA board
Chris from PyroElectro writes: Here’s a little project I thought you guys might like….I re-built the Masochist’s Video Card using the DE0 Nano FPGA board that I won in the 7400 logic competition. The project article has all the details and VHDL source code for download. Via the contact form.
Tutorial: using ChibiOS on Altera FPGA
Kiran writes: There is a great tutorial on how to use ChibiOS on Altera FPGA board by Michael Fischer. I tried and it works great. This tutorial covers how to use ChibiOS/RT on a Nios II cpu based on an Altera DE1 Board. Via the contact form.
CVSD audio compression codec in an FPGA
In this video Jeri Ellsworth demonstrates her design of a Continuously Variable Slope Delta (CVSD) audio compression codec in an FPGA. She was in need of a replacement for a damaged HC-55564 IC from (where else) a pinall machine and reverse engineered the chip, coding up a replacement in a Xilinx FPGA on a Papilio […]
Plus Too Apple replica on FPGA
Steve Chamberlin over at Big Mess o’Wires presents the Plus Too, a working hardware replica of the Macintosh Plus and Macintosh 512Ke computers. The original Macs contained a Motorola 68000 CPU and about half a dozen major support chips, with all of the Mac-specific behaviors and OS routines defined in a 128K toolbox ROM. Plus […]