Tutorial: Nut/OS on Altera FPGA

Posted on Sunday, August 12th, 2012 in code, FPGA, tcpip, tutorials by the machinegeek

Michael Fischer of emb4fun has a new tutorial on using Nut/OS on Altera FPGAs. His design uses the Altera DE0-Nano board and a self-made adapter equipped with a DM9000E-H board, and includes a short example for an Internet Radio.

Michael’s tutorial is divided into three parts linked below:
Part 1,
Part 2, and
Part 3.

Via the contact form.

This entry was posted on Sunday, August 12th, 2012 at 6:10 pm and is filed under code, FPGA, tcpip, tutorials. You can follow any responses to this entry through the RSS 2.0 feed. You can skip to the end and leave a response. Pinging is currently not allowed.

One Response to “Tutorial: Nut/OS on Altera FPGA”

  1. Alan says:

    The DE0 Nano has USB, bit only to bit-bang the JTAG interface. You can hack it, but (like the Papilio) you are better off adding your own High Speed USB interface. Or – in this case – add an Ethernet controller.

    The great thing about FPGAs is: the Copious Quantities of data they can process.
    The not-so-great thing is: development kit designs that FAIL to include a way to get that data into a PC.

    BY now, we should see FPGA dev kits default to gigabit ethernet, or super speed USB. Instead, we are lucky to get 100Mbit Ethernet, or high speed USB. Designs that boast “USB 2.0” and then provide a mere full speed 12Mbits (and NO Ethernet) leave you wondering: are they cutting cost corneres, or masking a fault with the underlying hardware?

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