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AltOR32: An OpenRISC CPU for small FPGAs

Posted on Tuesday, July 24th, 2012 in FPGA by DP

Ultra-Embedded designed a soft core 32bit openRISC CPU with basic ISA functionality for small FPGAs. It fits on the Spartan 3 featured on the Papilio One 250k development board, and comes in pipelined and  multi-cycle versions.

AltOR32 is an OpenRISC 1000 architecture derived RISC CPU targeted at small FPGAs and contains only the most basic ISA features from the OpenRisc project. Instructions & registers relating to Vector, floating-point, 64-bit extensions, MMU & Cache have been omitted. The aim of AltOR32 is to provide a simple 32-bit soft CPU architecture aimed at control applications that can fit in low-end FPGA technology. This architecture re-uses the OpenRisc GNU toolchain hence implements all instructions that cannot be disabled. Anything else is viewed as beyond the scope of this cut-down soft-CPU implementation.

Via the Gadget Factory.

This entry was posted on Tuesday, July 24th, 2012 at 1:00 pm and is filed under FPGA. You can follow any responses to this entry through the RSS 2.0 feed. You can skip to the end and leave a response. Pinging is currently not allowed.

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