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Online course for Altera’s SignalTapII logic analyser simulator for FPGAs

Posted on Thursday, March 1st, 2012 in FPGA, help by DP

In a previous post we wrote about Kiran’s review of Altera’s SignalTapII logic analyzer simulator for FPGAs. Jason let us know that Altera provides many free online courses for their tools, and one of them is for the SignalTapII. The course covers the following:

  • Add one or more instances of the SignalTap II logic analyzer to a design
  • Configure the SignalTap II logic analyzer to debug the design
  • Use the logic analyzer with incremental compilation to reduce recompile times
  • Operate the SignalTap II logic analyzer to capture data as defined by the trigger settings
  • Analyze data captured by the trigger condition(s) & use it to locate & fix bugs in the design
  • Use storage qualification, state-based triggering flow & power-up triggers

Via the comments.

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