Xilinx has released Issue 78 of Xcell Journal, their free online publication for embedded system and programmable logic developers. Each issue of Xcell has articles targeted at developers from every skill level, from beginner to expert. You can check out individual articles from this issue or download past issues back to 1988 at the Xilinx […]
Tag Archives: Xilinx
Xilinx ISE Design Suite v 13.4 now available
Xilinx has announced the availability of Version 13.4 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This release introduces their new MicroBlaze Micro Controller System (MCS), making a MicroBlaze-based processing system available in the ISE WebPACK edition. This is the software […]
DSJTAG – USB JTAG debugger and programmer for both Xilinx and Altera IDEs
Seeed has a cheap JTAG programmer/debugger for both major FPGA/CPLD brands. It emulates both the Xilinx Platform USB Cable and Altera USB blaster JTAG programmers with a flip of a switch. As a Xilinx Platform USB Cable it is supported by the manufacture’s iMPACT, ISE, Chipscope and EDK software bundles. The firmware is upgradable through […]
Xilinx CoolRunner-II CPLD starter kit
Arhi tipped us to this starter kit for CoolRunner-II CPLDs: I can highly recommend CoolRunner-II CPLD Starter Kit. I have this small board for a while and it’s more then you need to learn to use cpld’s and it’s fairly cheap ($60)… it’s of course proprietary, the atmel on board (that can be used to […]
XC95144XL breakout boards
Jason decided to make breakout boards for the XC95144XL CPLD. A voltage regulator along with bypass capacitors are placed on-board. He provided a oscillator, connected to a global clock pin as well. The board is built with a single row header so it can be used with a standard bread-board. There are two additional dual […]
App note: CPLD special function pins
Here is some basic information about special CPLD pin functions you might need when getting started with Xilinx or any other CPLD: Global Clock (GCK) pins Many high-speed digital logic designs need a clock signal that reaches all components simultaneously. While any CPLD pin can input a clock signal and distribute it to the design, […]
Xilinx ISE Design Suite v 13.3 now available
Xilinx has announced the availability of Version 13.3 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This is the software package used to develop for our CPLD Development Boards. Don’t want to download 4.9 GB? No problem. Xilinx is making the […]
Openschemes homebrew SVF player
Openschemes has a tutorial describing their project for bit bang JTAG programming of Xilinx CPLDs using their homebrew SVF player. They describe: Today’s lesson consists of the development of a bit-banged JTAG SVF player in order to program a device such as a CPLD. It’s quite likely that the SVF player we develop today could […]
Xilinx vs. Altera tools for hobbyists
Big Mess o’ Wires compared Xilinx and Altera’s FPGA tools: I used to believe that Altera’s FPGA tools were much more hobbyist-friendly than the comparable Xilinx tools, and I frequently bashed the Xilinx tools whenever the topic came up. But after giving them a head-to-head comparison recently, I think I may have to eat my […]
XESS download: FPGAs!? Now What?
Drone writes: XESS recently released their 92 page “FPGAs!? Now What?” book which is supposed to be a tutorial for the XuLA, but is really an informative read in-general; especially for someone getting started with Xilinx parts. You can download your copy of this 92 page PDF here. Via the contact form.
FPGA bitstream security broken
Researchers in Germany have released two papers detailing how security of the bitstream on Xilinx FPGAs can be compromised. The first paper (11 pages) discusses power analysis attacks and extracting keys from Virtex-II devices. The second (3 pages) describes an analysis of the Virtex 4 and 5 bitstream encryption mechanism. Via Slashdot.
App note: A CPLD VHDL Introduction
Here’s a concise 28 page tutorial doc from Xilinx entitled A CPLD VHDL Introduction.
Plunify online FPGA compiler conference call
MP3 download Plunify is an online compiler for Altera and Xilinx CPLDs/FPGAs. The developers’ goal is to build an interface to instant license and computer resources for large FPGA projects. Download the MP3 to hear more about their start-up and some of the difficulties they face with compiler licensing. We’re interested in Plunify because it […]
New release: XILINX ISE Design Suite 13.2
Xilinx has announced the availability of their ISE Design Suite 13.2. While most of the improvements appear geared toward the 7 Series FPGA families, if you’re in need of the Xilinx software or just want to upgrade you’ll find downloads for Windows and Linux here. As a much appreciated courtesy, Xilinx is also making DVDs […]
One step XSVF file generation for CPLD
If you’re using one of our CPLD Development Boards you need to have a file in XSVF format to download to the board using the Bus Pirate loaded with the BPXSVFPLAYER firmware. We’ve posted a method to convert SVF files to XSVF format, but Xilinx has included a handy way to produce “One Step XSVF” […]
Free Xilinx FPGA seminar
bearmos tipped us to a Free Xilinx FPGA seminar. These seminars often feel like a time-share sales pitch, but if you can stand it, or you’re a starving student, there’s usually lots of free hardware and food. We always take a netbook so we can start hacking right away if they hand out the goods […]
CPLD Commodore C64 memory project
The website 64HDD has plenty of information about mods and upgrades for Commodore C64 enthusiasts. They have an article explaining their exploration of using CPLDs in C64 hardware mods. Their first CPLD project, explained in the article, explores the build of a 256kB memory expansion board originally designed using TTL chips. The project uses the […]
Avnet Spartan-6 LX9 MicroBoard
In a recent comment, Zooboo informed us of the Spartan®-6 FPGA LX9 MicroBoard. Produced as a joint venture between Xilinx and Avnet, the MicroBoard includes a Spartan-6 XC6SLX9-2CSG324C FPGA, 64 MB LPDDR SDRAM, 128 Mb Multi-I/O SPI Flash, 10/100 Ethernet PHY, USB-to-UART port, on-board USB, JTAG circuitry, single-chip 3-rail power with Power Good indicator. It’s […]
Replacing discrete 7400 logic devices with CPLDs
Whether you are working on a retro computing device, or experimenting with digital logic, you’ll find that in most instances CPLDs can perform the same operations as a cluster of 7400 series discrete logic chips. Discrete logic devices, long considered the workhorses of the semiconductor industry, held a unit cost advantage over programmable logic devices […]
Xilinx ISE WebPACK schematic tutorial
The large CPLD schematic library guide posted yesterday contains a lot of reference material to digest. You may be wondering just how to get started with writing program files using the Xilinx ISE WebPACK software package. We found this concise tutorial by Digilent, Inc. covering the basics of creating a CPLD program using the schematic […]