FPGA bitstream security broken

Posted on Tuesday, July 26th, 2011 in documentation, FPGA, security by the machinegeek

Researchers in Germany have released two papers detailing how security of the bitstream on Xilinx FPGAs can be compromised.

The first paper (11 pages) discusses power analysis attacks and extracting keys from Virtex-II devices.

The second (3 pages) describes an analysis of the Virtex 4 and 5 bitstream encryption mechanism.

Via Slashdot.

This entry was posted on Tuesday, July 26th, 2011 at 3:00 pm and is filed under documentation, FPGA, security. You can follow any responses to this entry through the RSS 2.0 feed. You can skip to the end and leave a response. Pinging is currently not allowed.

2 Responses to “FPGA bitstream security broken”

  1. Andy says:

    I think you may have swapped the order of the papers. I believe the Virtex-II Pro breakage was first, and the second paper analyzes portability of that sidechannel attack to the V4/V5.

  2. the machinegeek says:

    Thanks. Switched them back now.

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