When you get your CPLD development board, you’ll want to start coding! Programs for Xilinx CPLDs are most commonly written in Verilog or VHDL, and you will find examples on our CPLD page. A third way which is usually easier for beginners is schematic entry which you can do in the free Xilinx ISE WebPack. […]
Category Archives: CPLD
Re-animating the PDP-11/70 with CPLD, ethernet
J. Peterson updated a PDP-11/70 console with an ethernet controller and a CPLD to control the blinking LEDs: I’ve always missed that visual and tactile aspect of computers that’s been lost since the advent of microprocessors. When a console for a PDP-11/70 came up for sale on Ebay, I couldn’t resist the opportunity to bring […]
Free PCB: CPLD development boards
To celebrate the launch of our new CPLD development boards we’re giving away PCBs. Just ask for a CoolRunner-II or XC9572XL dev-board in the comments, if you have a project in mind we’d like to hear about it too. Assembled CoolRunner-II and XC9572XL development boards are available now for $15.
NEW PROTOTYPE: XC9572XL CPLD development board
Ever get stuck choosing the right logic chip combination or voltage level translator? Give up the hunt and create your own custom logic chip. CPLDs can give you the logic you need, with the pinout you want, while saving board space and board revisions. The Xilinx XC9500XL family has some of the cheapest and readily-available […]
NEW PROTOTYPE: CoolRunner-II CPLD development board
Ever get stuck choosing the right logic chip combination or voltage level translator? Give up the hunt and create your own custom logic chip. CPLDs can give you the logic you need, with the pinout you want, while saving board space and board revisions. The CoolRunner-II XC2C CPLD has two separate banks of pins that […]
A beginner’s CPLD tutorial
Here’s a simple CPLD tutorial by Bitcycle.org which discusses detailed steps in the design and programming of a beginners first CPLD project. The project is adapted from Xilinx app note XAPP078, “XC9536 ISP Demo Board”. It uses the Xilinx XC9536 device, similar to the one on our CPLD development boards.
STATUS UPDATE: Bus Blaster v2
We’re trying a new Monday post with status updates on new projects currently in production. This will cover project development, and gritty details like last minutes changes and production problems. Bus Blaster v2 is going to rock! The design is so flexible and fun, we can’t believe it wasn’t the standard FT2232 JTAG debugger design […]
Xilinx releases ISE Design Suite 13
Xilinx has released version 13.1 of their ISE Design Suite. including a number of new features. This software is used to develop programs from Xilinx CPLD and FPGA products, including the CoolRunner-II chips found in our development boards. The suite includes the free Webpack ISE. Note that this is a ~4 GB download. However, Xilinx […]
Create NTSC video output from CPLDs and FPGAs
PyroElectro shows how to make NTSC video with a FPGA: NTSC video is a standard that has been around almost as long as black and white TVs. It’s a true analog standard, but we can use digital FPGA signals to create NTSC. This tutorial shows you how to output simple NTSC video to your TV. […]
Xilinx CPLD applications handbook
This document from Xilinx could easily be titled “Everything You Always Wanted to Know About Xilinx CPLDs But Didn’t Know Where to Look.” Its the Xilinx CPLD Applications Handbook, featuring the CoolRunner-II and XC9500XL. It’s a 422 page compendium of application notes, hardware interfacing tips and specs that any Xilinx CPLD user will want to […]
555 based FPGA/CPLD debugging oscillator
Randomgarfield from fromorbit posted the above video, depicting his use of a 555 timer as a small oscillator tο clock CPLDs whіƖе debugging a small state machine. I needed a variable slow speed clock to help me debug a design I’m creating with a bunch of CPLDs. Given the current focus on the venerable 555 […]
Trivia: CPLD on a PDIP?
Atmel produces what are believed to be the only CPLD devices sold in PDIP form: the ATF2500C and ATF750C . These devices are priced at between $5 and $8 at Digikey and Mouser. Programming hardware and software is available from Atmel. Atmel provides free design software known as WinCUPL, which mainly supports programming in the […]
Xilinx free CPLD/FPGA design handbook
Xilinx has a helpful free publication, the Programmable Logic Design handbook. This quick start guide introduces their line of CPLD and FPGA devices and the basic steps to program development using their ISE Webpack. A listing of application notes and reference designs is included. Download your own copy of this 144 page PDF.
Xilinx XC9500 CPLD docs
Here’s a quick link to the Xilinx library of support documentation for the XC9500 series of CPLDs. Datasheets, user guide, app notes and more!
XSVF specification document
We’ve referred to various file formats for programming CPLDs and FPGAs in recent posts. One is the Serial Vector Format (SVF), an industry standard file format that is used to describe JTAG chain operations in a compact, portable fashion. Its specifications are fully described in this 26 page PDF produced by Texas Instruments. To provide […]
VHDL tutorial from UPenn
The University of Pennsylvania’s Department of Electrical and Systems Engineering presents this tutorial on the VHDL programming language. VHDL is one of the primary languages used to program CPLDs and FPGAs. Once you get your program written, you can load in onto a device with your own Bus Pirate for $30, including world-wide shipping. Also […]
NEW APP: Bus Pirate CPLD/FPGA programmer
It’s easier to program CPLDs and FPGAs from the Bus Pirate with a new firmware and PC application. The Bus Pirate has done JTAG with OpenOCD for a long time. OpenOCD is usually overkill for a simple CPLD or FPGA project though, and many find it difficult to get started. Clear back in Bus Pirate […]
CPLD breakout board PCBs
A box of PCBs just arrived with the new CPLD breakout board designs. The top board is for the XC9500XL family (XC9572XL), the other boards is for a CoolRunner-II (XC2C64A). Check out the quick start guides for these parts. Both boards have all the pins broken out to header, and jumpers for IO voltage selection. […]
MIT OpenCourseWare: Introductory Digital Systems Laboratory
MIT has a program known as OpenCourseWare designed to provide free access to course materials from previously presented MIT courses. Course offerings from all academic disciplines are available and the list grows periodically. MIT OCW even has their own YouTube channel. Here’s an interesting offering, Introductory Digital Systems Laboratory, covering topics related to CPLD/FPGA program […]
App note: Interface SDRAM and DDR SRAM with a CPLD
irrenhaus tipped us to demo projects that interface SDRAM and DDR SRAM with CoolRunner-II CPLDs: There is a reference implementation from xilinx how to interface a SDRAM memory from a CoolRunner-II CPLD XAPP394: “Interfacing to Mobile SDRAM with CoolRunner-II CPLDs” and XAPP384: “Interfacing to DDR SDRAM with CoolRunner-II CPLDs”). So my idea was: Why not […]