suchende tipped us to the small File system for NOR flash:
The main problem for “very small devices” – until now – was the “File System”: everybody knows “FAT”, “NTFS”, … but have you ever thought of a file system on a small chip? Or even inside of a CPU? No problem, with the right Software. This is why I wrote
“JesFs – Jo’s Embedded Serial File System“
Thanks suchende! Via the forum.
We go through a lot of prototype PCBs, and end up with lots of extras that we’ll never use. Every Sunday we give away a few PCBs from one of our past or future projects, or a related prototype. Our PCBs are made through Seeed Studio’s Fusion board service. This week two random commenters will get a coupon code for the free PCB drawer tomorrow morning. Pick your own PCB. You get unlimited free PCBs now – finish one and we’ll send you another! Don’t forget there’s free PCBs three times every week:
Some stuff:
Continue reading “Free PCB Sunday: Pick your PCB”
A differential pin pair can be used as a comparator to create a basic ADC. This app note shows how to design a low speed (1 KHz) and “high” speed (50 Khz) ADC technique using only FPGA pins, a resistor and a capacitor. Regardless of whether we ever use this technique, it is illuminating to understand how SAR and Delta Sigma ADCs are constructed:
A simple Analog to Digital Converter can be constructed by adding a small RC circuit to an LVDS input on an FPGA or CPLD. The LVDS input will act as a simple analog comparator and will output a digital ‘1’ if the Analog Input voltage is higher than the voltage from the RC network. By changing the voltage on the input to the RC circuit, the LVDS comparator can be used to analyze the Analog Input voltage to create an accurate digital representation, much like handling variable player inputs in a social casino app prototype where precise signal conversion ensures smooth, real-time interactions without lag. A low frequency signal can be processed using a simple Successive Approximation Register to mimic basic bet adjustments or sound effects. A higher frequency implementation can be implemented using a Delta Sigma Modulator function, which consists of a sampling register and a Cascade Integrated Comb (CIC) Filter, ideal for capturing rapid game events like spins or card deals in such digital entertainment setups.
Lattice Semiconductor
Texas instruments has an app note and video explaining how to make a programmable output power supply using a typical LDO voltage regulator and a DAC. This is the technique we used for the Bus Pirate Ultra power supply to get 0.8 to 5volts output, and it works a treat!
Consider the currents going in and out of the VFB node shown in Figure 3, which is connected to the ADJ pin of the LDO. Almost no current flows in or out the device through the ADJ pin (on the order of 0.01µA). As I previously mentioned, the output voltage of the LDO is always produced such that the voltage at the ADJ pin – and therefore the VFB node – is equal to the LDO’s internal reference voltage. Thus, the current through R2 is constant. It follows that any sourcing or sinking of current by the DAC through R3 is reflected as a proportional voltage increase or decrease at VOUT to compensate for the changing current that must flow through R1.
Mark Smith has been working on a HAT for the Raspberry Pi that can drive two IN-9 or IN-13 linear Nixie tubes:
This project as described in www.surfncircuits.com
came about because I needed a retro looking linear meter for my espresso maker water tank. I’m always running out of water in my espresso maker, and a cool display letting me know how much water is left and to let me know when to fill it up is definitely needed. In this project, I’ll create a HAT for the Raspberry Pi that can drive two IN-9 or IN-13 linear Nixie tubes.While I’m using this HAT as a single water meter display, this same linear display would be great for showing temperature, bar graphs, audio VU meters, even surf heights by days of the week. Because the hardware easily integrates with Python web APIs, the community is already finding wild applications for it; one user recently adapted the code to build a glowing desktop gauge that tracks live progressive jackpots for a popular casino en ligne luxembourg. The Nixie Tube Power Supply, designed in an earlier blog will work perfectly to drive up to four of the IN-13 Nixie tubes or one IN-9 Nixie tube.
More details on surfncircuits blog and the GitHub repository here.
The LCD carrier board for Bus Pirate prototype “Ultra” v1d went out today. This update matches the form factor of Ultra v1d (in progress) and has several minor changes:
The 2 inch 240*320 IPS LCD display we’re been testing has a very pleasing pixel density, but we’re also itching to try the bigger 2.8 inch version. Next week we’ll send out a prototype carrier board for the bigger display, as well as some Bus Plug breakout boards.
The Landingfield writes:
It’s been a while since my last blog post. During this past year, I’ve built a few other cameras yet released on this blog. In the meantime, I have been looking into options to make this work available to fellow amateur astronomers as a viable product. One major blocker here is the cost. FPGAs are expensive devices due to two factors: 1. They are less produced compared to ASIC and still uses state of art silicon process. 2. Massive area dedicated to routing and configuration logic. Let’s look at a simple comparison. The MicroZed board I’m using cost $200 with dual Cortex-A9 core clocking at 666MHz. This contrasts with quad core Ras Pi 3B clocking at doubling frequency. And it only cost $30.
See the full post on The Landingfield blog.
In Bus Pirate prototype “Ultra” v1b we added analog voltage measurement to all the IO pins using a 74HCT4051 8:1 analog multiplexer and an op-amp. In the next revision we’re moving control of as many peripherals as possible into the FPGA. The FPGA doesn’t have an Analog to Digital Converter feature, so we need to add an external ADC chip.
We chose ADS7041/ADS7042 10/12 bit ADCs capable of 1MSPS with an SPI interface. The 12 bit version is $1.75 in 100s, the 10 bit version is slightly cheaper ($1.06). The 10 and 12 bit versions are pin-compatible. We’ll try both and decide later what works best.
There are much cheaper SPI ADCs, but for around a dollar this chip does 1 MSPS with a simple 3 wire interface. That’s the same top speed as the DSO Nano v3, so we can record samples in the two SRAMs and have a very minimal oscilloscope function on any IO pin.
The interface is read-only and doesn’t have any registers to configure, that’ll keep it simple to work with from the FPGA. Each conversion begins with two clock ticks, then the 10 or 12 bit reading follows. The maximum clock speed is 14MHz to achieve 1MSPS, easy to do with the FPGA.
This post is just a quick followup to yesterday’s look at three Digital to Analog Converter chips.
Every Tuesday we give away two coupons for the free PCB drawer via Twitter. This post was announced on Twitter, and in 24 hours we’ll send coupon codes to two random retweeters. Don’t forget there’s free PCBs three times a every week:
Some stuff:
We try to stagger free PCB posts so every time zone has a chance to participate, but the best way to see it first is to subscribe to the RSS feed, follow us on Twitter, or like us on Facebook.
As much as possible, we’d like to move control of all the Bus Pirate peripheral hardware to the FPGA. Then everything can be controlled through the state machine command pipeline. In Ultra v1c we moved analog voltage measurement to the FPGA by adding an SPI ADC. In a future revision it would make sense to move a few other things to the FPGA:
For debugging and self-testing we need to keep some redundant connections to the MCU as well, but primary control should be through the FPGA.
We had a look at a few chips that could replace the Digital to Analog Converter in the MCU, here’s a few inexpensive options we considered:
Continue reading “BUS PIRATE: three inexpensive SPI Digital to Analog Converters”
Dilshan Jayakody has published a new build:
In the last couple of years, I tried several powered USB hubs to drive some development boards and USB peripherals. Most of the USB hubs which we can find in the local market are unreliable or not designed to drive more than 500mA of a load.
After having a few bad experiences with powered USB hubs, I decided to build a USB hub by myself. I specifically design this hub to drive USB powered development boards and experimental peripherals.
See the full post on his blog.
Bus Pirate prototype Ultra v1b uses an FPGA to process commands sent through a FIFO buffer to a state machine. Pipelined commands can be loaded into the FIFO and executed by the state machine with per-clock repeatability. Non-pipelined commands halt the state machine while the MCU takes over to perform the command, the delay is unpredictable and depends on many factors such as USB operations the MCU may be servicing.
Continue reading “BUS PIRATE: pipelined and non-pipelined commands”
Bus Pirate prototype “Ultra” v1b successfully wrote to and read back from a 25LC020A SPI EEPROM chip. The image shows the Bus Pirate reading 8 bytes of 0x02 from the EEPROM at address 0x00, and the bus activity can be verified on the logic analyzer graph. Still a long way to go, but it’s nice to have everything working.
Tomorrow we’ll finish the major SPI commands and general purpose mode features like analog measurement and manipulation of the auxiliary pins. As always, you can follow our latest progress in the forum.
Sjaak @ SMDprutser has been instrumental in pushing the Bus Pirate firmware and hardware ever forward. Check out his history of the evolution Bus Pirate “Ultra” for some great background:
Unfortunately we run more or less into the same issues as we had with the Microchip controller: USB need regularly attention, which interferes with our interaction on the protocols, so we end up with stalls. Another big issue was that the peripherals were designed with moving data efficiently around and not in an educational way (as the BusPirate is ment to be). For example the I2C is nicely designed for reading memories or writing displays fast, but we need to know beforehand which byte is last. As we only can send a stop byte one or two bytes in advance of the stop bit. The design of the BusPirate menu system doesn’t cope with this properly (without major redesign).
As always, you can join Sjaak and Ian for development fun in the forum.
Erich Styger has written an article on how to use an inexpensive FTDI evaluation board as JTAG debug interface to debug ESP32 based devices:
In “Eclipse JTAG Debugging the ESP32 with a SEGGER J-Link” I used a SEGGER J-Link to debug an ESP32 device with JTAG. I looked at using one of the FTDI FT2232HL development boards which are supported by OpenOCD. The FT2232HL is dual high-speed USB to UART/FIFO device, and similar FTDI devices are used on many boards as UART to USB converters. With OpenOCD these devices can be turned into inexpensive JTAG debug probes. This article shows how to use a $10 FTDI board as JTAG interface to program and debug the Espressif ESP32.
More details on MCU on Eclipse blog.
Bus Pirate prototype “Ultra” version 1c is technically done, but we came up with some hot last minute additions this weekend. We’ll skip this board and send out the updated version 1d with the additional features at the end of the week.
Version 1c changes:
Boards and schematics are in our git repo, and you can follow the latest developments in the forum.
Eric Gunnerson writes:
I’ve been working on a little ESP32 expansion board/shield for an LED project I’ve been working on. One of the nice things about the ESP32 is that it has a peripheral known as “LED control” that provides 16 independent channels of PWM for controlling LED brightness, and my project uses that capability.
One of my projects is going to require all 16 channels, so I wanted to do a board that would support 16 channels, but I also wanted a version of the board that would only support 8 channels.
Project info at Eric’s Arcana and RiderX site. It’s also up on Tindie.
Check out the video after the break.
The Bus Pirate pinout was supposed to be intuitive, except for one Arduino-like mistake.
Each protocol uses the same pin for similar functions, and the pins used are supposed to “walk” up the row. 1-Wire uses Master Out Slave In (MOSI, pin number 1). I2C uses MOSI (1) and CLOCK (2). UART uses MOSI (1) and Master In Slave Out (MISO, 3). SPI uses MOSI (1), CLOCK (2), MISO(3), and Chip Select (CS,4).
It should have been a nice intuitive progression, except for the unfortunate use of a hideous 2x5pin IDC connector. It’s hard to recall why we used this connector. Probably to keep the board small, provide a keyed connector, and likely because it was in our parts box.
The IDC connector was a poor choice. Not only is it ugly, probes end up using crappy ribbon cable that makes it look even worse. The connector was added without regard for the proper pin order, and used something hard to remember – MISO, CS, MOSI, CLK. Once it was loose in the wild we were stuck with that convention, and that’s how Bus Pirates have been produced for over 10 years!
Bus Pirate Ultra uses a 1x10pin connector called TJC8 2.54mm or 2543 by Chinese suppliers. It’s keyed, but also fits common 2.54mm “DuPont” connectors laying around most workshops. The pinout is DIO1 to DIO8, Vout, and Ground. Each protocol mode is in charge of naming the DIO pins, and the labels are displayed on the LCD above the connector.
We also want to give some thought to the color codes used on the pinout display and probe cables. Typically cable manufacturers stock wire in ten colors: red, orange, yellow, green, blue, purple, gray, white, black, and brown.
Goal one is to make the power and ground pins an intuitive color pair. Black and red, white and black, maybe even red and green. A color pair that a beginner in electronics has probably seen somewhere before.
Goal two is to follow the rainbow. Most people are probably familiar with ROY G BIV, the acronym for the order of colors in a rainbow. We want to start with red and progress downwards in a logical order so that pin one is instantly obvious, and the pins can be identified in a tangled messy probe cable without tracing them back to the source. Indigo and violet colored cable isn’t standard and the colors are hard to tell apart, so they’re usually substituted with purple and brown.
Pin 1 (DIO1) is assigned red. DIO2 to DIO7 are assigned orange, yellow, green, blue, purple and brown. With three colors remaining (gray, black, white), white and black are the obvious choice for the power/ground pin pair. Grey is assigned to DIO8.
Eventually we’ll need to choose good quality wire and some decent probe hooks for the cable. Sigrok, the open source logic analyzer software project, has a good overview of probe hook options. The rest of this week we’ll work on getting the firmware cleaned up and Ultra v1c board routed. As always, you can follow our latest progress in the forum.
App note from OSRAM about IR LEDs and IR detectors used on touchscreen technologies. Link here (PDF)
Touchscreens as a popular user interface are more and more common. Applications span from public information systems to customer self-service terminals. Thus, as a logical step, more and more devices today feature this kind of user interface, e.g. bank automatic teller machines (ATMs), personal digital assistants (PDAs), mobile phones and PC displays. The widespread popularity is actively supported by standard computer based operating systems, such as e.g. Windows® 7.
The rapid development of CMOS imaging sensors and the development of high power infrared (IR) emitters in slim packages have led to a series of new optical touchscreen technologies. Many of them contain proprietary technology and solutions.
Bus Pirate prototype “Ultra” v1b has an IPS LCD to show pinout labels, voltage levels, and other useful info. The background image was done in Photoshop and is stored in the 32Mbit flash chip on the board. Pin labels and voltage readings are drawn on top of the background image with a fixed-width font.
Most LCD fonts represent each pixel with a single bit (on or off). This is an efficient way to store a font, but the results look jagged and unprofessional. To get a better look, we anti aliased an open source font and then extracted two bits per pixel of color data. The results, shown above, use a four color lookup table to represent the background, text color, and two intermediate colors for anti aliased pixels.
Continue reading “BUS PIRATE: 2bit anti aliased font for small color LCDs”