Power down sequencing and discharging on FPGAs app note from Diodes Incorporated. Link here (PDF) FPGA’s need the different power rails to be powered up and down in a defined sequence. For power down, each sequenced rail needs to be fully off before the next rail is turned off. With large high speed and high […]
Tag Archives: power sequencing
App note: Tracking/Sequence for point-of-load DC/DC converters
Another app note (PDF) for power sequencing from Murata Whereas in the old days, one master switch simultaneously turned on the power for all parts of a system, many modern systems require multiple supply voltages for different on-board sections. Typically the CPU or microcontroller needs 1.8 Volts or lower. Memory (particularly DDR) may use 1.8 […]