hlipka made a logic analyzer with 2 oscilloscope channels that uses a Cypress PSoC chip. It works with SUMP clients like Open Logic Sniffer. Goal of this project is to develop a combination of 2-channel oscilloscope with a 32-channel logic analyzer. Sample speed will be 1 Msps, with a depth of 6k samples (when using […]
Tag Archives: SUMP logic analyzer
Bus Pirate extended logic analyzer firmware
flubberlab made an alternate firmware for the Bus Pirate with extended support for the SUMP logic analyzer protocol. This firmware works with the latest Jawi client and has lots of features: Sample clock source (32 MHz CPU clock): Internal, 5.9 Hz to 108.8 kHz, jitter = -0/+250 ns External (via AUX pin), rising or falling, […]