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Posts Tagged ‘exposé’

Why right angle bends on a PCB are not so bad

Monday, December 31st, 2012

We've heard it numerous times: avoid using right angle bends in PCB routing. Here's an article from EDN magazine explaining why it's not as bad as most people think. The article explains that the "bad" effects like increased capacitance and circuit noise only start to be a pain for designers...

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Posted in PCBs, techniques | 18 Comments »

A look at our spammer friends

Thursday, December 27th, 2012

The Akismet spam filter service we use on blog comments seems to be letting lots of spam through lately. We're moderating all comments with links, as well as first time posters. That requires human interaction and increases lag between posting and seeing a comment, so we'll continue to look for...

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Posted in Editorial, site | 13 Comments »

Recent Comments

  • Pekka Akselin: This is ridiculous!? :-) We are back at 256(!) byte EPROMs that needed multiple, a handful, of voltages to run! :-(
  • KH: Let's try a back-of-envelope calc balancing energies. From MCP1700 datasheet, there are graphs for a 200mA load step. Estimate the energy shortfall as 12uJ. Say...
  • Daniel: It's been a week and my comment is still awaiting moderation. Apparently the CIA doesn't want their involvement known?
  • KH: Agree, so okay, I guess he must have learned from somewhere. 100nF and 1000uF is so far apart, that was jarring; it's more magic incantation...
  • Max: I have a suspicion the hefty electrolytic cap might be some sort of cargo cult carry-over from other RF-based projects - for instance, I've seen...