Why right angle bends on a PCB are not so bad


We’ve heard it numerous times: avoid using right angle bends in PCB routing. Here’s an article from EDN magazine explaining why it’s not as bad as most people think. The article explains that the “bad” effects like increased capacitance and circuit noise only start to be a pain for designers where signal speeds are above 1 GHz.

Right-angle bends in PC-board traces perform perfectly well in digital designs in speeds as fast as 2 Gbps. In most digital designs, the right-angle bend is electrically smaller than a rising edge. For example, the delay through a right-angle bend in an 8-mil-wide, 50Ω microstrip trace in FR-4 is on the order of 1 psec. That’s less than 1 percent of a 100-psec rise time.

Via the contact form. Thanks Chuckt.

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  1. Problem here is not delay, nor (directly) impedance. The real issue with right-angle blends is reflection, and this is something you want to avoid, at least in RF designs.

    In digital designs probably it’s not that significant, but if you’re laying out differential signals, you will avoid those cause you cannot ensure constant differential impedance. So a 45 degree is much more suitable.


  2. There are still reasons to chamfer right angles: traces will generally be shorter thus reducing trace resistances and inductances. Also possibly less important these days, but I was taught that gentle angles were less likely to have etching problems during manufacturing.

  3. Yeah, I agree with Jon above… I’ve been taught that you don’t do right angle bends particularly on narrow traces, as its possible that some of the etchant can gather in the corner and affect trace width. This is particularly a concern for controlled impedance traces, even if they’re not gigahertz range signals.
    I’m sure if you’re getting high quality boards made at a professional fab house, this isn’t as much of an issue as they have the etching process down to a science. However, if you’re doing your own boards or using an ultra-cut-rate PCB house I would keep this design rule in mind.

    1. Yes, No, and Maybe. depending on the part, connection and connector(who soldered it). In vertical scale for SMT, it’s a very very small corner and at that scale the etching tech causes porosity. For PTH this is some issue, and why you don’t want “hersheys kisses”.

      To paraphrase, “it really only matters once you get into double digit ghz. or fat half inch traces, at reasonable speeds. Or have 10-100 right angles in a single trace at high speeds. Or if you get impossibly close with a measuring device.”

      It’s not like say water molecules, where they have to travel the whole path. It’s electrons Jumping from one atom to the next and kicking out one that is already there.

      Thus they always travel in a straight line to the adjacent atom. As I understand quantum mechanics they don’t even actualy travel, they jump from A to B. Someone with a degree would have to explain better.

      1. It is a lot weirder than that at the quantum level. Jumping is only the beginning. Being in 2 places at the same time, electrons spontaneously appearing or disappearing, cats being dead and alive at the same time….

    2. for RF design where right angles are a problem, RF components are as close to the shape of a microstrip as possible. See for example the MGF 1302 and other microwave transistors (you can use google images)

  4. Even if the laws of physics does not change over time, I think this short text from the year of 2000 should not be given to much attention. The basic feeling I get from it is about the same as I get from those columns written with a fancy use of language in magazines. A lot of words but not so much hard facts with source references.

    Happy New Year everyone!

  5. Vias are right angles, avoid them? yes as much as you can..as mentioned the problems with right angles is the reflection the change in the width of the trace (while turning) causes the problem at high speeds – source and load impedances dont match then we might have a problem.

    The bigger problem with vias is the inductanceof the cylinder in data acquisition systems that could cause a problem..also in 8 to 20 later PCBs there are vias that are backdrilled to avoid antenna effect on an over embedded via..use multiple vias as possible to minimize the resistance (my rule of the pinky) :)

  6. I’m sure that the “acid traps” that allegedly occur when doing 90 degrees or sharper bends are just an old wive’s tale – at least with modern pcb manufacturing techniques. How the heck can any significant amount of etchant be trapped on and/or affected by an edge that is less than 35um (1/1000 inch) on a board that are being constantly sprayed with a rather high pressure etchant?

  7. one of our customer wants etch factor of 1:1 ratio or 90 deg
    angle. This is required for RF application boards. At present we are
    getting 1:2.9 at an angle of 70 deg . In order to improve upon , we need
    your suggestion to monitor our etching chemistry. At present we are
    following parameters.

    1. pH 8.2-8.6
    2. Density 23-27 deg baume
    3. Temperature 48-53 deg C
    4. copper content 150-160 gms/ltr
    5. Molarity 5.7 M

    An early reply is always appreciated & your visit along with
    concerned technical person.

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