App note: Using a microprocessor to configure Xilinx FPGAs via slave serial or selectMAP mode


Great app note from Xilinx on configuring their FPGA through slave serial and parallel selectMAP mode

This application note describes a technique for configuring an FPGA from an embedded processor. Three common components are required: an embedded microprocessor, some non-volatile memory, and a CPLD. Cost, as well as real estate, can be reduced if the function of a dedicated configuration device, such as a PROM, can be integrated within these three components.
Note: Some systems might not require a CPLD if the microprocessor has a sufficient number of general-purpose I/O (GPIO) pins available. For these systems, the Xilinx FPGA can be configured directly by the microprocessor.

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  1. After reading this, my question remains: can you program the PL side of a Zynq from the PS side?
    From what I’ve heard, the answer remains as: No.

    Which prompts the follow on question: why settle for a Zynq, when a basic ARM and a Spartan are more adaptable out of the box?

  2. This app note does not apply to Zynq. With Zynq, the PL side can only be programmed from the PS side for security reasons.

    IMHO this app note isn’t really useful for small designs. If the FPGA doesn’t have internal flash, use the fastest mechanism available – which is usually from connected SPI flash. Then a uP is free to reprogram the serial flash whenever an upgrade is needed.

    1. for small designs (or when boot time is not ciritical) you don’t need any additional hardware, just prog,cclk,din in serail slave mode. You can even connect both the fpga and the mcu to the serial memory. Since the xilinx parts ignore the bits before a sync word in the stream you can then just toggle prog pin and just read out the bitstream

  3. I was recently searching for similar document for Altera FPGAs because I’m planning to build a device which will contain a microcontroller and FPGA. I want to store many FPGA configurations on a SD card and let a microcontroller to transfer one of those images (user selected) to FPGA. Reading an FAT32 SD card is pretty simple, and for Altera I’ve found a document that clearly describes the configuration process:
    I’ll try to implement this in the near months.

    1. Same thing i also trying. have you completed this uC+FPGA ?
      Please give your advice for this chapter.

  4. One of the main reasons the MachXO2 is my FPGA of choice now is the ability to program the internal config flash from I2C – even on a fresh device from the factory. Simplifies config, makes it brick-proof, and allows me to re-purpose JTAGs for GPIO. Nothing like 114 usable I/Os on a 144 QFP.

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