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3 Comments

  1. Disclaimer: I have zero FPGA experience. I do have a logic sniffer though.

    I often only use one or two channels and would find a longer recording time very useful. On the logic sniffer hardware description page, I see mention of adding external RAM in the next design iteration. I ask this out of interest (and some ignorance): would it be possible to hang a SRAM or DRAM where this wing would usually go? I understand the bitstream would have to be rewritten to take advantage of this but I was wondering if these 16 I/O pins were capable of driving any kind of RAM at the speeds necessary for a logic probe. I would even sacrifice some top speed sampling rate for the functionality.

  2. Can Logic Shrimp do RLE (run length encoding)??
    Use it on OLS! I my set of data it extends visible window by 10x.

    But still would be a great addition to have more RAM (for under 50MHz)

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