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  1. the main problem with dip switches is their capacitive effect, and the noise they can introduce at high speeds. I think that for OLS, the best is to use completely electronic switches and control those switches using an MCU or using simple dip switches. Analyzed signals need to never pass through dip switches.

  2. Well they don’t :-) Even if it may look like it, the signals are always ‘connected’. The only thing that is switched are the pull-up/down resistors.

    I was thinking about using a 3-state buffer + mcu + led feedback first, but it got a bit out of hand in the financial department.

  3. Resistor value affects your static current draw, and thus power. If you have a tight budget, like on a USB Device, you might not want very small resistances. The Logic Sniffer probably has some spare power, but I’ve never calculated how much. I suppose the total current through 16 or 32 resistors would never amount to much, but if you’re up against the 500 mA limit then every little bit counts.

    A more important factor of the resistance is the rise time or fall time. Unfortunately, this depends almost entirely upon what kind of circuit you probe with the Logic Sniffer, because it’s the capacitance of the node under test that combines with the resistance to create an RC time constant.

    In other words, I don’t think you’ll ever find the ‘best’ resistance, at least not for every circuit that you might want to analyze with the Logic Sniffer. I suppose you could find a happy median, but it seems like there’s always the potential you might connect to a circuit where the resistors will be too slow or too low.

  4. Then I just won’t enable them ;-)

    The resistors are primarily intended for unconnected probes, so it doesn’t matter a thing. Why not just ground them? Because one day I will forget and short a signal. That may or may not fry an I/O pin.

    1. In that case, you’re designing exclusively for the FPGA pins, and not for any connected circuit. Thus, you do not need both pull-ups and pull-downs. You can simply look at the FPGA data sheet to see which would be a better choice. You can cut your circuit board size in half. The best resistance would depend upon the topology of the FPGA pins, based on the mode that they are programmed by the Logic Sniffer design. I suspect that a particular pull-down resistor will be your best choice.

  5. Note: Since you’re only interested in terminating unused Logic Sniffer inputs, it doesn’t make sense to pull up to 5 V when the FPGA is running at 3.3 V for I/O. You can get rid of the jumpers for voltage. Besides, if you just go with switched pull-downs, you won’t need a supply voltage on your board at all.

  6. Yup. I already figured that out ;-)

    Pull-down works best. And I’ve already made a pull-down-only variant, which indeed is about half the size and cost.

    Now that I have these boards here sitting on my desk, I will make them usable for SPI / I²C as an added bonus for me.

    1. Unfortunately the larger board with 4 dip-switches looks much nicer than the bare-essentials one with just switchable pull-down resistors (which is much easier to use). The red/green contrast is nice.

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