Posted on Wednesday, April 6th, 2011 in logic analyzer, Logic Shrimp, Prototypes by Ian
The Logic Shrimp is a medium speed, low-cost logic analyzer with a USB interface. It can capture up to 256K samples at 20MHz, and is compatible with the open source SUMP logic analyzer client.
The 23K256 serial SRAM from Microchip makes this project possible. Each chip stores up to 256K samples from one logic analyzer channel. After demoing the SRAM at Hack a Day, Ian made a one channel logic probe with a single chip. The SCANALOGIC2 inspired this 4 channel version.
- 4 channels @ 256K samples per channel
- 5volt tolerant inputs
- 20/12/6/3/2/1MHz capture rates, and lower
- Simple edge change triggers on all channels, adjustable pre/post trigger samples
- SUMP protocol compatible
- USB interface, USB firmware upgradable
- Open source (CC-BY-SA)
Hardware design overview
The Logic Shrimp design is diagrammed above. Four 23K256 SRAMs capture up to 256K samples on each channel. The SRAMs run at 3.3volts, but the Logic Shrimp inputs are 5volt tolerant thanks to a 74LVC573 buffer. A PIC 18F24J50 configures the SRAMs and provides a capture clock source: either from the pulse-width modulator, or from a 20MHz oscillator though a one-bit buffer.
You can get a Logic Shrimp for $34.90 only at Seeed Studio.
This entry was posted
on Wednesday, April 6th, 2011 at 11:07 am and is filed under logic analyzer
, Logic Shrimp
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