Designing a power supply for FPGA includes multiple voltage, ripple management and power sequencing, here’s an app note from Maxim Integrated. Link here (PDF)
Field-programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs) require 3 to 15, or even more, voltage rails. The logic fabric is usually at the latest process technology node that determines the core supply voltage. Configuration, housekeeping circuitry, various I/Os, serializer/deserializer (SerDes) transceivers, clock managers, and other functions all have differing requirements for voltage rails, sequencing/tracking, and voltage ripple limits. An engineer must consider all of these issues when designing a power supply for an FPGA.
This is ridiculous!? :-) We are back at 256(!) byte EPROMs that needed multiple, a handful, of voltages to run! :-(