App note from Vishay on high-side MOSFET failures investigation leads to one of the following modes of operation:
(a) High-impedance gate drive
(b) Electro-static discharge (ESD) exposure
(c) Electrical over-stressed (EOS) operation
More on it here (PDF)
Power MOSFET failures in high-side applications can often be attributed to a high-impedance gate drive creating a virtual floating gate, which in turn increases the susceptibility of the MOSFET to failure during system-generated ESD and EOS scenarios.