Systematic PCB verification approach


From the comments on our previous PCB Checklist post, George Hadley shared this helpful checklist for submitting a PCB to a fab house:

Systematic PCB Verification Approach (PDF!):

1. Parts completion check:
1. All major components included?

  1. Microcontroller/FPGA/SoC/Microprocessor/CPLD?
  2. Power supply/regulation?
  3. Sensors?
  4. User interface elements? (LCDs, buttons, switches, etc.)
  5. Actuator drivers and control? (Motor control? LED constant current drivers? Audio
    filters and amplifiers? Etc. etc. etc.)

2. All support components included?

  1. Microcontroller system guidelines or minimum connection requirements followed?
  2. Application circuits and/or app notes for all major components followed?
  3. Support components proper package as well as value? (Power circuit support
    components designed to handle provided voltages and currents?)

3. Other components included?

  1. Programming header?
  2. Reset tact switch?
  3. Power connector(s)?
  4. Mounting holes?
  5. Power indicator(s)?
  6. Heartbeat LED?
  7. Oscillator/clocking circuitry?
  8. Debugging LEDs/interfaces?

2. PCB Footprint Verification Check:
1. All parts fit on 1:1 scale printout of PCB layout?

3. Parts placement check:
1. Crystal close to microcontroller?
2. Decoupling caps close to/under microcontroller?
3. Connectors on board edges?
4. Parts grouped by system and/or in way that minimizes trace lengths?

4. Mechanical/Space Conflicts check:
1. Has x- and y- footprint space around electrical pins and pads of all parts been accounted
2. Has z- height of all parts been accounted for?
3. Has clearance been provided for the bolt heads of all mounting holes?
4. Have connectors been placed on the outer edges of the board where appropriate? Are they
overhanging the edges of the board where appropriate? Are they oriented in the correct
5. Are traces clear of all mounting and mechanical support holes?

5. Routing completion check:
1. All traces routed? (Ratsnest command reads “nothing to do”?)
2. Oscillator traces clear of interfering signals?
3. Traces of appropriate widths to handle current being passed? (Including power traces?)
4. Traces entering pads at 90-degree angles (or 45 degree angles, where appropriate)?

6. Routing minimization check:
1. Traces have been minimized where possible?
2. Octagonal layout mode has been utilized where possible?
3. Right angles have been removed, accept where necessary?4. Acute angles have been eliminated from routes in designs?

7. Via minimization check:
1. Vias have been eliminated to the extent reasonable?

8. Signal plane check:
1. Signal planes have been included, to the extent reasonable?
2. Analog ground (AGND), has been separated from the main ground net in accordance with
microcontroller datasheets? (Alternatively, AGND should be separated from GND by a 0Ω
3. Isolation on all signal planes has been set to at least 12 mils?

9. Silkscreen check:
1. Silkscreen labels have been provided for all component IDs and connector signal names?
2. Silkscreen labels have been appropriately placed near components, but not on top of pads
and pins?
3. Pin 1 of all ICs and other polarity-sensitive components (such as diodes) is clearly marked?
4. Board silkscreen layer includes names of all team members?
5. Board silkscreen layer includes a descriptive name to identify the board?
6. Board silkscreen layer includes a revision number and/or last modified date?




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  1. I would also add, if using Eagle, to run an ERC. It will catch a lot of simple, but subtle errors. For instance, nets that only have one connection. A particularly devious problem occurs if you move a wire onto a pin. In this situation, Eagle won’t automatically add a junction, so you can check the schematic and it’ll look fine, so will the ratsnest, but you’ll end up with an unrouted net.

    It’s also good because it encourages you to add values to parts – even if you *know* that cap should be a 100n.

    I would also make sure that you check (visually inspect!) whether the traces going into each part actually match up to the datasheet. You can easily mirror a footprint or mix up the pin-pad assignment and you won’t notice from an ERC/DRC. This mostly applies to personal libraries, but it’s happened often enough that I check every time out of habit.

  2. All motor vehicles like cars and bikes used to come with a similarly sized checklist in the user manual to be strictly followed every – single – time before you use the vehicle (nothing visibly broken, tire pressure ok, all lights functioning, fuel level satisfactory etc. etc.). I’m absolutely confident we all do all of that every time, without fail, before turning the key in the ignition…

  3. To those commenting, I would like to say that yes, you are correct in your various suggestions (and thank you for them). For context, the PCB checklist I created is focused around senior design students submitting their PCBs at the conclusion of the circuit board design process. This list is a rundown of the most common “gotchas” that my students encounter. The issues listed above are important and are generally addressed at earlier stages in the design process. Should the suggestions mentioned in this thread become major issues for the students, they will in likelihood be added to the list. Thanks!

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