Here’s a summary of major developments over the last week. Free PCB Friday is coming up soon:
- WORKSHOP VIDEO: Video editing workstation build
- Part Ninja v1 in this week’s status update post
- Bus Pirate v4 and Bus Pirate PIC programming adapter are back in stock at Seeed Studio
- Bus Pirate Arduino Shield, Bus Pirate v4 LCD adapter v2a and Microchip TQFP-100 breakout board free PCB build
- Using Bus Blaster v2 to debug STM32s from CooCox
- Contiki on the web platform documentation update
- Box of new PCBs: Part Ninja v1
- 3D Model: CPLD development boards
- Check out Alan’s reciprocal frequency counter in the project log forum
Coming up:
- Free PCBs via Facebook on Friday
- App notes on the weekend
- Free PCB Sunday
- New 3D model on Monday
- Free PCBs via Twitter on Tuesday
- Free PCB mailing how-to video
- Weekly roundup and preview every Friday
What are you hacking this week?
Hmmm… By now that new Seeed Studio JTAG programmer must be feeling pretty lonely and neglected in its new home :-(
ok, ok, I’ll get it written :D
I’m looking forward to hearing more about it too. The information on Seeed’s site and wiki page is pretty sparse (the “schematic” is nothing more than a DOFed 3/4-view photo). But from reading around it sounds like an interesting parallel to the Bus Blaster, using a Cypress CY7C68013 instead of an FT2232H. Is the CPLD programmable via USB, or does it have a programming header, or are you not expected to play around with it?
The Xilinx programmer emulation sounds like it isn’t too fascinating, the same Cypress and CPLD are in the real thing so it could just be using the “real” Xilinx VID and PID to trick the Xilinx drivers/software into uploading the real firmware onto it. The Salae (and USBee) clones do the same thing, breaking out a CY7C6801a and wiring it up to an EEPROM with Salae’s IDs preprogrammed, and Salae’s drivers automatically load their latest firmware onto any cypress chip with the right ID (because the real hardware is also a CY7C6801a with the IO pins broken out to a header and an EEPROM with the right ID). I suppose the Seeed JTAG programmer could work as a Salae clone too, though the necessary IO pins might not all be broken out for that or the CPLD might have to be reprogrammed.
But what does sound interesting is the Altera emulation. It sounds like that is actually handled via (partial) emulation of an FT245 chip by the cypress chip’s 8051 core. That’s a lot more interesting to me than just having the correct BOM to run an original’s firmware. http://ixo-jtag.sourceforge.net/ looks like it’s probably the inspiration for the idea of emulating the Altera’s FT245 inside an 8051, it might even be the same code on this board.