Jason has been working on a portable software defined transceiver design for the past year. Every day this week he’ll discuss a different part of the hardware in a series of guest posts. You can chat with the designer in the forum. Today’s post is about the transmitter.
The transmitter portion of a transceiver is usually quite a bit simpler than the receiver, and the one in this system is no exception. I’ll start by listing the requirements for the transmitter:
- It must support BPSK and QPSK (we have quadrature signals from the VFO, so why not).
- It must provide complementary signals to the power amplifier.
- The power amplifier requires a square wave drive at moderate power levels (class D operation).
Lots more below.
We meet the two requirements by using a 1:4 multiplexer to switch one of the 4 phases, and its complement, to the PA driver. We meet the third requirement by using six 74AC04 gates arranged in two groups of three in parallel to drive the power amplifier (PA). The dynamic output impedance of the 74AC04 gates is approximately 30 ohms, so with three in parallel we should be driving the PA with a sufficiently low impedance (10 ohms) to assure stability and fast switching times for efficiency.
Below is a schematic of the transmit driver. A PDF schematic is attached to this posting if you would like to see it more clearly. There is an obvious error where one of the outputs of the 74AC04 is not connected to the other two. I will update all of the schematics when the design is completed as I expect there will be a few changes and corrections along the way.
If you were to add an impedance matching network to the transmit driver, you would find it is capable of producing about 300mW of output power. Of course it would be very rich in odd harmonics, so you would need to add a good low pass filter as well. The PA (which will be detailed later) will boost this output to approximately 3 watts.
Via the forum.