Altera – Page 2 – Dangerous Prototypes

Altera CPLD/FPGA Quartus II design tutorials

If you have an Altera development board, such as the MAX V CPLD board or the UP1, UP2 or DE series of board, Altera has a collection of free video tutorials covering many aspects of CPLD/FPGA circuit design and programming of devices using their Quartus II design software.

Altera introduces Max V CPLD

Altera has introduced their Max V family of CPLDs. Features include operation from a single 1.8 volt external supply for device core, internal oscillator, user flash memory block of up to 8 Kbits for non-volatile storage with up to 1000 read/write cycles, and multiVolt I/O interface supporting 3.3, 2.5, 1.8, 1.5 and 1.2-Volt logic levels. […]