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Altera introduces Max V CPLD

Posted on Wednesday, December 8th, 2010 in Chips, documentation by the machinegeek


Altera has introduced their Max V family of CPLDs. Features include operation from a single 1.8 volt external supply for device core, internal oscillator, user flash memory block of up to 8 Kbits for non-volatile storage with up to 1000 read/write cycles, and multiVolt I/O interface supporting 3.3, 2.5, 1.8, 1.5 and 1.2-Volt logic levels. In system programming can be accomplished with any of the familiar Altera “Blaster” cables. Single unit prices start under a dollar, and a dev kit will reportedly ship in February. Complete documentation is available on the Altera website.

This entry was posted on Wednesday, December 8th, 2010 at 2:30 pm and is filed under Chips, documentation. You can follow any responses to this entry through the RSS 2.0 feed. You can skip to the end and leave a response. Pinging is currently not allowed.

One Response to “Altera introduces Max V CPLD”

  1. bearmos says:

    I’m not really into CPLD’s (or FPGA’s) currently, but this seems like it’s coming in at a half-decent price point $1.70 and $4.90 for 64 and 192 macro cells, respectively. Anyone have a sense of what can be accomplished with this class of device?

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