We’re really excited to be joined by Jack Gassett, developer of the Butterfly FPGA platform, to prototype an open source, high-speed, low-cost logic analyzer. This effort grew out of a bunch of great comments on a post about open source logic analyzer clients.
Share your ideas for the logic analyzer in the new ‘SUMP PUMP’ logic analyzer development form. Jack has already posted a power estimate for the FPGA, and Ian has some thoughts on interface design. Maybe someone can suggest a name?
i got it thanks. i need to buy the cable now :)
In keeping with the bus pirate name format, how about calling it the Bit Peeker?
I really like that.
Full force development, layout, and price estimates happening now in the forum!