DirtyPCB LSF0204 breakout board – a bidirectional, multi-voltage level converter

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Francesco’s LSF0204 breakout board,  a 4-bit, bidirectional, multi-voltage level converter:

I needed a small, fast and reliable multi-voltage level translator (mainly for connecting ESP8266 boards to the Arduino, got tired of resistor networks pretty quickly) so I built a breakout board for TI’s LSF0204(D).

Datasheet and info here.
The LSF0204 is a nice little chip. It can translate up to 4 signals to and from the following values:
1.0 V ↔ 1.8/2.5/3.3/5 V.
1.2 V ↔ 1.8/2.5/3.3/5 V.
1.8 V ↔ 2.5/3.3/5 V.
2.5 V ↔ 3.3/5 V.
3.3 V ↔ 5 V.

Design files on Github.  Leftovers (PCBs only!) are available on Tindie.

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20 Comments

  1. I’d been wanting to know how to do this kind of panelizing.
    Do we add the lines on the mill layer along the edges of each PCB copy or between the edges?

    1. Hello Haley,

      what I did on these PCBs was split the dimension layer and route it up to the vias, in order to minimize the number of vias on the boards.

      Here’s an image of the dimension layer (white) and vias only: http://i.imgur.com/kFJcniS.png

      If you look carefully, you can see that for each horizontal group of three boards, only one is connected to the group below.

      I believe you could also use cross-shaped slots on the milling layer, but when uploading to DirtyPCBs the preview was wrong (no white space between the boards, yet I believe it was just a display error) so I went with the safest, and maybe easier to manufacture(?) way.

      It is also my advice to round the edges on your boards: it’s something I forgot to do with these ones but I’ve got another package coming which contains panelized PCBs with rounded edges.. I will post them too.

      Hope this helps!

      Francesco

      1. Yeah sorry. I put together a real dodgy rendering script. It is OK for the packing department to ensure you get the right boards but has nothing to do with the dirty board house.

        So we will have a new site and use gerblooks pythong rendering engine which is soooo much better and usually right.

      2. Ah now I see it, that helps a lot! A preview of your panelizing is just what i need to understand.

        At first I was wondering whether you had used the mill layer and placed the mill path between the PCB edges, cause the milled “slots” looks rounded near the snap off tabs. So according to your drawing, the fab house mill should be able to mill with just the edges on the dimension layer. And I suppose they would contact you if the spacing between two dimension edges is smaller than what they are capable of.

        As for round the edges, I suppose you mean round the corners? Why is that important?

        Thanks!

      3. Sorry to jump on this thread late, but I cannot get the preview to show me anything. I am using the “dev.” test site. It just sits there with a “Rendering” message. I have refreshed the page and have also let it think overnight. The gerbers were produced in Altium. I renamed the Board Outline to “.GKO” and also tried “.GML”.

        Is the system broken or is there a known issue that I missed?

  2. When I did this, the outer ‘slots’ were on the board dimension layer, and the inner slots were (only) on the milling layer. It worked very well, even though I didn’t put the drill holes as close to each other as this one.

  3. I think the CAM will combine the dimension and milling layer into one. All my panelized boards use the dimension layer

    Ps. Is there a way to have not plated holes? I’m using just drills instead of vias, but the pcbs have plated holes which could give troubles (shorts) in some situations.

    1. Currently dirty board house doesn’t support non plated holes. We may add it via secondary board.house in the future though. Dirty means cheap and simple :)

      1. WTF?!

        Why cant i have top notch quality for dirt cheap $. You should give me another discount for not having non plated holes !!!

        Just kidding I’m just very happy to have a decent PCB quality source with sortof panalizing. You get what you pay for.

    2. I am aware of the fab house stating all holes will be plated. If I use just holes instead of vias, would there still be pads surrounding each hole and make it look like normal via?

      If each of the vias is separate and not connected to any other signal traces or power planes, how would that give shorts? Please enlighten me as I am inexperience in this.

      1. The metalized vias (for breaking the pcbs) are near the sides. When you snap off most of the times they ‘stick’ to the pcb instead of the break tab. Also they can come loose and may cause conductive schrapnell.

        For fixing holes it is perfect as they stengthen the hole.

  4. If your CAD tool thinks you have a non-plated hole, it won’t generate an anti-pad around it to create clearance, and avoid shorting to any nearby trace or flood-fill area. Most boards I work with have otherwise unused space occupied by ground fill or power plane, on each layer, so in any given spot a plated-through hole that is supposed to be non-plated, with no associated net and no clearance around it would likely cause a short. If you are careful to check for shorts manually, you might be OK but normally this is something the DRC is supposed to check for you.

  5. Here’s my drawing that is going to be sent to the fab after this chinese festive season: http://i.imgur.com/ELCLc5w.png

    That is a small opening that I need in my design. But I also need a PCB USB connector and that space fit perfectly for 1 with break off tabs. I’m using holes as oppose to vias for the break tab. The holes seems to give wider clearance to the plane fill compare to vias in this case.

    So if the fab is going to make these holes into vias, would there be any foreseeable problems? Advice is much appreciated.

    1. You might want to put curves on the edges of the outline – In my case, I assumed that the milling bit was going to be the same diameter as the slots, so put semi-circular ends on the slots to make life easier for the pcb machine. I think you’ve also got the same spacing hole-to-land as I had, and that worked well.

      The holes don’t get turned into vias as such (there’s no change to the top or bottom layer, and no pads surrounding them) – they are ‘just holes’, but they are plated inside. As long as they’re clear of copper pour, which they look like they are, it should be fine.

  6. Can you give me the width of the groove you made, and the diameter and spacing of the holes ?

    (I could not find a specification for minimal milling diameter, so I guess I will jsut use what you already tested :) )

    thank you.

  7. …and holes are 0.02inch diameter, 0.05inch centre-to-centre. (Apologies for the double post – tablet troubles)

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