The design is for 0…30V and 0…3A (90W) controllable at ~1mV and ~0.1mA steps. The actual accuracy is still out for testing and I assume that noise and non-linearity will be a factor to look at when time comes. The basic design allows for 0…42V (max 45V) and (at least) 0…4A, but then all the components should be re-calculated to match such setup. Also, some components need to be voltage matched for a higher input voltage.
The design is a dual control-loop where the first stage is a switching PSU which is fed back to assure a 2.5V drop over the secondary analog control stage. The secondary stage is also responsible for the current limiter. The idea here is to reduce the power loss in the BJT (Q4) in the analog stage.