Using two NAND 3-input gates and a D-type flip-flop, he build a clocked analog comparator. After reviewing the internal composition of a CMOS NAND 3 gate he noticed that two of them connected in the right way make up a comparator. To make his own version he used a D-type flip-flop to save the output value from the gate before it resets on the next cycle. Schematic, as well as some logic gate theory, is available on his site.
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