Categories

Plunify interview questions

Posted on Thursday, June 30th, 2011 in CPLD, FPGA, interviews by Ian

Tomorrow we’re talking with Plunify, the developers of an online compiler for Altera and Xilinx CPLDs/FPGAs. They added the CPLD dev-board demos to a list of project examples, and made a tutorial video. We put together a how-to when we tested it.

Unfortunately, Xilinx has not yet given Plunify permission to use the compiler in this fashion, so the tutorial cannot go live for the moment… We’ll talk to them about that happened, and ask your questions too.

Please post questions in the comments below, or in the forum.

This entry was posted on Thursday, June 30th, 2011 at 1:59 pm and is filed under CPLD, FPGA, interviews. You can follow any responses to this entry through the RSS 2.0 feed. You can skip to the end and leave a response. Pinging is currently not allowed.

Leave a Reply

Notify me of followup comments via e-mail. You can also subscribe without commenting.

Recent Comments

  • KH: TPS62200 will get him to under 15uA, a bit better than the 20-30uA he mentioned. I would try the same thing. Switch some resistors in...
  • KH: Yeah, it's an end-user thing. Very few people would spend hundreds of hours on this kind of project and sustain it. It's more or less...
  • Max: Not quite a dinosaur if you've seen Big Hero 6 though... wait. You've watched it with your kids, didn't you? That's cheating...! ;) One of...
  • Edward Mallon: A visiting researcher dropped by our humble basement workshop with questions about the physical skill level students would need if they added one of our...
  • KH: And that looks really expensive... Only browsed the vid though, I'm an dinosaur so I had the sound off too. Nice of him to open-source...