Bus Blaster: High speed USB to JTAG, SPI, UART

The Bus Pirate can program flash chips with flashrom and debug JTAG devices with OpenOCD, but it doesn’t do these things very fast. It was designed for human-speed interaction. The Bus Pirate is a good way to learn an EEPROM chip, but you eventually integrate the chip in a real circuit with actual code. In the same way, the Bus Pirate is a good first-taste of JTAG or ROM programming, but if you do it regularly you’ll want something faster with more features.

The Bus Blaster is our solution, a device just for high-speed device programming and debugging. We’re currently designing the Bus Blaster in the forum. It will be a USB 2.0 JTAG/SPI/UART device based on the FT2232H. The FT2232H is a USB->serial converter like the FT232R currently used on the Bus Pirate, but is also has a module called an MPSSE that can be configured for high-speed JTAG and SPI modes. It won’t have a terminal interface or be programmable like the Bus Pirate, this will be a specialized programming/debugging device intended for some upcoming ARM-based projects.

Why not use the FT2232 on the Bus Pirate? The PIC on the Bus Pirate uses a serial UART to communicate, it’s converted to USB via the FT232 chip (note only one 2). The top speed is limited by the PIC UART, and not the USB connection. The FT2232 is bigger, more expensive, and requires more support components, but wouldn’t improve the Bus Pirate speed. The most direct way to make the Bus Pirate faster would be an integrated USB microcontroller.

Image from the flashrom project.

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  1. Hi Ian,

    Just to say we using the very same module for our JTAG programmer at work. Be very careful with the JTAG signals as we have some device boards where the JTAG refuses to link on.


  2. Will it still appear as /dev/ttyUSBx (in Linux at least) or would it instead require a direct USB access (with libusb for example)?

    And the protocol – will that be similar to BusPirate’s binmode are you planning something completely new?

    1. I’m not 100% sure how it appears. The goal is to make something compatible with an FT2232 programmer that’s already supported by OpenOCD and flashrom. The interface will be the standard FTDI MPSSE (and UART) interface, nothing custom, it’s an entirely different beast than the Bus Pirate binmode.

  3. I wonder if this device (and bus pirate eventually…) would be adequate to use as a USB blaster cable from Altera’s quartus to program Altera’s FPGAs (which are JTAG in principle…)

  4. After several years as a Windows programmer I felt woefully anemic interfacing hardware. Robotics especially haunted me. Linux laughed at me and I knew, one of these days… too soon…
    So last november I decided to take the plunge. First I spent a ton at Sparkfun. Finally I discovered Seeeduino. Sometimes I wish they had more stock, but other times I wish I had more cash.
    This year (among other things) I’ve bought 2 IRToys, a Buspirate, a Web Platform and a logic sniffer. (I keep thinking I want a twatch but I’m avoiding twitter, facebook & co. I keep thinking uncle Bill bought them after he bought Google, but nobody noticed because Steve had them dazzled).

    I feel like a reasonably equipped, recently discharged – (ex)patient. Not quite clueless, thoroughly happy in strange surroundings and I can’t get enough!
    My Seeeduino reminds me that all is well.

    But I’m writing about the Bus Blaster. I want one. I may decide one isn’t enough. The Flash Destroyer strikes me as evil, like army engineers who blow things up, but the Bus Blaster reminds me of my first modem, and all those BBSs in my area code…
    Any hint as to when the Bus Blaster might catch up to my venture into the real world? I’m enjoying life outside the cubicle, clutching my Seeeduino and hoping to catch up before someone asks to see my Visa.
    I’d feel a lot better with a Bus Blaster.

    1. Hi Dennis – Thanks for the kind words, glad you’re enjoying the stuff.

      We’ve been developing the Bus Blaster in the forum, we’ve been hung up on the buffer chip for some time. There are a few candidates, but it might be better to use a CPLD. It should be one of the next projects to be prototyped, but it will still be a couple months until everything is ready to sell.

  5. Hi;
    I am waiting to buy this.
    As the parallel port is vanishing and JTAG seems to need it.

    I cannot do surface mount stuff so it would have to be assembled, not a kit.

    I too bought a Bus-Pirate and a Logic Sniffer from Seeed
    (tutorials would be great).

    I try to support Open Source, I run Fedora 13.

    Mick M

  6. I wonder, and haven’t found the answer clearly yet.

    Can the bus-blaster, theoretically at least, perform all the tasks the bus pirate does? Or do you really need both? Are there advantages and disadvantages of using either/or? The only thing I do know, is that the bus blaster can do jtag muc much much faster.

    1. Bus Blaster is specifically JTAG for use with apps like OpenOCD, while the Bus Pirate speaks a ton of different protocols from a serial terminal. BB is for machines to talk JTAG, BP is for people to talk 1-wire, I2C, SPI, UART, etc.

    2. FT2232 is capable of Serial, I2C, SPI, JTAG. But for each protocol, you have to set the hardware with a program. So in a way BB may be used as a BP with a specifically designed computer program (which is not present as I know of). BP’s advantage is that the whole program runs on BP, you can use serial terminal easily to change modes etc.

      I use BP all the time. BB is for JTAG programming only for me.

  7. So basically, I theoretically could do everything with a BB, but ideally i’d want both, as the BP is easier (and more ‘available’) to use.

    I don’t mind it as much as my wallet will then :)

  8. I see the target connects to the xilinx which is connected to the ftdi’s jtag channel a.

    However if the FTDI chip supports JTAG natively, why is the cpld needed? What value does it add above a simple level shifter?

    I could buying one to play with a cpld, but looking at the schematic, if you have it configured for jtag, then the cpld doesn’t even have any clock input! Perhaps I’m missing something, but without some sort of a clock, you are limited to what you can do with this thing!

    1. It is a simple level shifter, but the alternate in discrete logic is 10x more expensive and less flexible. The CPLD is used for voltage translation between target and device under test. It also implements the buffer logic so the pins can go high impedance for eg pulled-up reset lines, something the FTDI can’t do. It is also self-programmable so the CPLD can pretend to be many different types of programmers for different applications. Already we were able to add the new serial JTAG protocols with a KT-link compatible buffer.

      There are connections to the global clock pins that can provide a clock for experimentation, but no clock is needed in this design.

      Please check out the design documentation for more info:

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