Here is an app note from Texas Instruments describing how to implement basic voltage translation circuits in your design.
Today’s complex electronic systems involve a multitude of power planes. In order for these mixed-mode systems to operate properly, some type of voltage translation or clamping is necessary. This allows the different input/outputs (I/O) to communicate with each other without damage from overvoltage,
A simple and inexpensive way to accomplish this is with an FET voltage clamp circuit. For this example, the Texas Instruments SN74TVC3306 dual voltage clamp is used. By connecting one I/O of the FET to Vcc, the designer is able to use one of the I/Os on the opposite side as a voltage reference (Vref). This allows the designer to regulate the outgoing voltage by adjusting Vref. Vref is not able to adjust above Vdd – 0.8 V.