Altera has announced the release of their MAX V CPLD line and companion dev kit. Altera’s webcast describes the dev kit and demos a few simple examples.
The MAX V family of low cost and low power CPLDs offers density ranging from 40 to 2,210 logic elements (LEs) (32 to 1,700 equivalent macrocells) and up to 271 I/Os, making them suitable programmable solutions for I/O expansion, bus and protocol bridging, power monitoring and control, FPGA configuration, and analog IC interface. They also feature on-chip flash storage, internal oscillator and memory functionality, with single unit prices between $1 and $12 depending upon features and IO lines.
For more detailed information see the MAX V handbook and dev kit description.