All components using rewritable memory have a finite limit on the number of program/erase cycles they are specified to endure. Researching this issue yields the following data in regard to CPLD memory write cycle specs:
Xilinx XC9572XL 10,000
Xilinx Coolrunner-II XC2C64A 1,000
Altera’s Max V CPLD 1,000
Altera’s Max 3000A/7000 100
Lattice Semi MachXO2 100,000
By contrast, typical write cycle specs for conventional MCUs such as those manufactured by Atmel (Atmega168/328) and Microchip (PIC 16F84A) are 10,000.
it’s worth noting that some Microchip xxJxx series having the ethernet tranceiver integrated (like PIC18F97J60) have only about 100 cycles endurance ;)
Yeah, I read about that in the DP blog some time back. Why is that? Why would MCHP put crappy flash in some devices?
It is worth noting that these cycles can be speced differently, the typical standard is for a 10 year retention time. If you aren’t going to need that time you may be able to flash it many more times than the spec.
As for MCHP 100 cycle flash. Ti has the same issue on 130 nm devices. Flash typically fails because the insulator around the floating gate develops pin holes. So all that is needed to get “bad flash” is being to optimistic with some process line that makes the chips design. Since the layer thicknesses are all pretty much mandated by the FAB there is nothing that can be done if you can’t change the process line. In Ti’s case they own the FABs but it might not warrant the rework on the line needed as all the chips other layers might need correction, as all the capacitance change, etc.
Good points. Another reason for flash specs being what they are is the temperature range of the part. Flash performance is tested using high temperature accelerated lifetime testing, then extrapolated back to the chip’s rated temperature range. All else being equal, chips with a higher max temperature spec will appear to have worse performance, even if they performed the same at the elevated temperature. Similarly, the performance is specified for particular statistical bounds, such as six sigma. The vast majority of parts will greatly outperform the datasheet lifetime spec, especially when kept at room temperature.
I’ve long suspected that another reason is cost. If an MCU is designed to be used in cheap, never-repaired consumer devices, it will never be programmed more than once or twice in its life. (Twice only if the test and final firmware are separate loads.) A 100-cycle rating is plenty for such a use, so why spend the money and time to qualify the chip for 10,000 cycles? I don’t know how much this is a real cause for short cycle-count specs, but I wonder.
This is making me feel bad about using my Max just to play with PWM D: