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Topic: Dangerous DSO Analog FE (Read 15801 times) previous topic - next topic

Dangerous DSO Analog FE

HI All,
I am late to the DSO party so please excuse me for asking something obvious. I was looking at the FE Op Amp
and had a thought experiment. Currently, the OPAmp is configured in an inverting gain configuration, with the
gain adjusted by attenuating the input signal with reference to a constant gain(2X). My thought was why not use a PGA
instead? There are tons of PGAs that are available with Booku Gain, Bandwith and convenient SPI interface that could
be controlled directly by the PIC. Any thoughts?

Ananth

Re: Dangerous DSO Analog FE

Reply #1
Do you have a link to an example part I can check out?

Welcome to the forum :)
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Re: Dangerous DSO Analog FE

Reply #2
Ian,
GLad to be here!. Take a look at http://focus.ti.com/docs/prod/folders/print/pga870.html
It is a fully differential driver with very good CMRR specs. Considering that the ADS 830 gladly accepts a differential signal, the PGA870 can be wedged in with minimal impact to the signal chain downstream. The 8 bit gain control has to be driven by the FPGA under user control(rotary POT). This is what the big guys do I think. Just a thought.

Ananth

P.S It is available in a "not so hobbyist friendly" 28 pin VQFN. That could be a show stopper, no??


Re: Dangerous DSO Analog FE

Reply #4
The PGA870 would be a perfect fit. We currently use single-ended input, I'm not sure how to work differential into it but it sounds like the direction to go. Too bad about the package though. I think QFN is do-able though, and I'm soldering it more and more. The exposed pads make it quite "easy".

I have worked with the Microchip PGAs before. I was really hopeful for them, but I think the bandwidth is an issue. The TI part has 650MHz -3db, but the Microchip parts only have 2-18MHz.
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Re: Dangerous DSO Analog FE

Reply #5
Here is another part that is featured on the SPartan3E starter kit that has a much lower GBW but is in a hobbyist friendly package.
http://cds.linear.com/docs/Datasheet/6912fa.pdf

If you want to test the PGA870, let me know and I can order samples and drive it with a Spartan3E FPGA  to sample a sine wave input for starters.

Cheers,
Ananth

Re: Dangerous DSO Analog FE

Reply #6
Well, yeah, we need to get some and try it out :) I'll send a QFN breakout with my next batch of boards.
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Re: Dangerous DSO Analog FE

Reply #7
You plan to make a separate analog part to OLS, because OLS electronic components and DSO is very similar?

Re: Dangerous DSO Analog FE

Reply #8
It has been discussed, but I think the analog design is too risky for us to ever manufacture unless a really good analog engineer helped make the project perfect.
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Re: Dangerous DSO Analog FE

Reply #9
I am a bit sad that not much has happened int he length of this thread. :(

You can get a not so bad 50 msps ADC, stick some op amps in there for getting the signal "proper", and use a FPGA with some DRAM for data storage. I am sure that once I finish my power supply design I will give lots of information in this thread of what I did and how I did it.
What speed are you guys aiming for by the way? If you are aiming for say, a few megahertz at most, it should not be that difficult to implement. Especially since there is an FPGA already there. :P Any higher gets more difficult to work with, such as trace impedance and cross talk on the PCB. I don't think eagle handles trace impedance/length, so you would have to do it by hand or eye in eagle, or cough up for an impressive PCB design suite like altium to take care of the high speed portions of the design.

Re: Dangerous DSO Analog FE

Reply #10
I was looking to breath some life back into this idea with a stronger outline on goals. A wide BW AFE is not hacker friendly at least in hardware, but on the software side there is almost to much possible. If we pound out a prototype is anyone out there interested?

Re: Dangerous DSO Analog FE

Reply #11
[quote author="raynor512"]I was looking to breath some life back into this idea with a stronger outline on goals. A wide BW AFE is not hacker friendly at least in hardware, but on the software side there is almost to much possible. If we pound out a prototype is anyone out there interested?[/quote]

I am not sure it really is a matter of intrest, a simple 2 ch 10Mhz bandwidth front end for the OLS would cost probably cost about twice the total cost of the OLS alone, forget a trigger channel.

i have a design that would work well, but again the bom cost is about $40/45 per channel without adc.

 

Re: Dangerous DSO Analog FE

Reply #12
Guys, you should read this article on scope probes:  http://www.syscompdesign.com/AppNotes/probes.pdf

Probably explains the glitches your seeing.  You may need a < 20 pf capacitor across your 1 M input.  Now use a x10 probe.

Having a fast rise time signal, i.e. the cal test point helps you compensate the probe.