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Topic: nop before setting TCK (Read 3895 times) previous topic - next topic

nop before setting TCK

Hi Bus Pirate gurus:

I have been looking at OpenOCD_asm.S and found the following instruction and associated comment:

Code: [Select]
   nop  ; /* still must pause a cycle because */
        ; /* we wrote [w9] last cycle ...    */

I do not know the Bus Pirate CPU, so I am only guessing when reading its assembly code.

Is there any hardware limitation that mandates you have to wait between consecutive writes to a GPIO port?

If so, could we do away with that nop and swap the next two or three instructions? That would mean reading TDO before TCK's rising edge, but that should be OK, because TDO should be ready to read right after TCK's last falling edge.


Re: nop before setting TCK

Reply #1
Thanks for looking through the code. Robots wrote that and would be the guy who would know best. I think your solution makes sense, but I did not double check the ASM reference for this PIC.
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Re: nop before setting TCK

Reply #2
Assembly part of the code was written by TNT. And yes, you have to wait one instruction cycle between writes to GPIO. It is stated somewhere in Datasheet, and typically overlooked (Sjaak knows ;) )

Re: nop before setting TCK

Reply #3
grumble grumble :D