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Topic: KT-Link/SWD SWV support (Read 10040 times) previous topic - next topic

KT-Link/SWD SWV support

Just a thought:
Maybe you want to also think about connection the FT2232H BDBUS1 (UART RX) to a free pin of the CPLD - it's imo the only thing needed to build the KT-Link interface into the CPLD (KT-Link: http://www.shop.kristech.eu/product_inf ... anguage=EN, user manual with interface diagram on site 6: http://www.shop.kristech.eu/download/KT-LINK-UM-ENG.pdf).
The KT-Link is prepared for the use of the SWD protocol (UART style - so it needs the UART RX) and since this protocol is currently beeing build into OpenOCD I think there will be a lot of people who will use it :).

Nils

Re: Re: Forked FT2232H + CPLD design

Reply #1
I attached the schematic. I don;t quite understand what they are using the UART RX for. I have never heard that SWD or SWV involve a plain UART, though I'm no expert. I always thought it is clock and DIO with a reset like PIC. Here's a reference to various JTAG types:
http://www.computex.co.jp/eg/products/p ... su_eng.pdf

Even with the BDBUS pin there are only 16 pins used.  I am confused why it would straddle the two ports. They cannot be controlled through the same handle, and you loose the UART on the B interface if you make a new handle to use it with the A interface.

Anyone have thoughts or discussion? If it is required, we can roll it into a revision of the Bus Blaster. I'd kind of like to see actual OpenOCD code to check what it is doing first. I recall they said it would be a major rewrite to support SWD, but someone came along and dumped a major patch I think.
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Re: Re: Forked FT2232H + CPLD design

Reply #2
Hi,

there is SWD and part of it is SWV (serial wire viewer).

The SWD consists of only 2 connections, SWDIO and SWDCLK. These are the pins used for the JTAG like debugging. But you can enable the SWV pin which gives you a plain output stream of very nice data - look at the ARM CoreSight architecture to learn more about it.

For example: It gives you the ability to view system and memory states in realtime (on some processors) because it can be clocked at up to 100MHz. Also it gives you the ability to trace your program execution for profiling the application running on the microcontroller.

The SWO (serial wire out, also named SWV) has two operation modes which I now of: The realtime 100MHz tracing mode and also a USART style mode which operates on 1MBit/s and seems to give you the data in a RS232 manner so you can read it in with a UART -> USB converter for example.

There is already a little code snippet laying around somewhere in the OpenOCD list which could connect on such a UART port on linux and read the data and perform some operations to convert it into a GProf readable file.

The SWD support is currently beeing implemented in OpenOCD and will (hopefully) be ready in version 0.5.0.
The first device having drivers for it is the freely available Versaloon.

Also there is the LibSWD (http://sourceforge.net/apps/trac/libswd) which seems to be the SWD library which is beeing developed for usage in OpenOCD. On the main page of the project (see link) there is also a link to the stm32primer2swd project wiki which states the KT-Link as SWD kompatible.

To say the truth I don't know really much about the SWD thing. But I wanted to take every chance to support it because of the profiling thing. So I did include the UART so one can use OpenOCD to activate it and another software to read the SWV output on the second UART channel of the FT2232H.

Nils

Re: Re: Forked FT2232H + CPLD design

Reply #3
Fantastic summary, thank you so much.

I think I can implement all of that in the CPLD except the UART part.

I want to be able to use the UART in the CPLD logic. It's going to need to be a double connection, so the main JTAG pins go to a CPLD IO pin too. That could be an issue because we're out of IO pins, and the KT-link design still uses all but one of the Abus pins. Any ideas? I guess a bigger CPLD?

A double-connection has the advantage of translating the second UART/etc to the target voltage levels.
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Re: KT-Link/SWD SWV support

Reply #4
They didn't use ADBUS4, which is JTAG_BUF_RESET on the jtagkey pinout. This is frustrating :)

The next biggest CPLD is 100 pins, that'll certainly do it.
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Re: KT-Link/SWD SWV support

Reply #5
Yah I think a bigger CPLD is the way to go if you want to support all of it.

The CPLD could then be a XC2C64A with 100 pins for example. It's a little bit more expensive but (for me) that's ok I think.

Also you could then break out all unused pins of the CPLD so they can be used for other modifications which I can't think of now ^^. Maybe some of them for controlling internals of the CPLD?

I think I will put some work in a modified layout the next days but I can't promise it.

Nils

PS: Just to get it right: Why does the jtag reset pin has to have a buffer enable? Is the state undefined while it is not active? Why can't it simply connected?

Re: KT-Link/SWD SWV support

Reply #6
Here are the schematics for my first try for a version with a XC2C64A-VQ100.

It's still supporting my custom JTAG header for the STM32 with UART connection. Now it should also support the KT-Link style SWD (SWV).

I'm tired so don't expect a version without errors ;).

Nils

Re: KT-Link/SWD SWV support

Reply #7
Nice update! I'll probably follow suit soon.

Quote
Why does the jtag reset pin has to have a buffer enable? Is the state undefined while it is not active? Why can't it simply connected?

Opps, JTAG_BUF_EN. It toggles the JTAG programming pins outputs or high impedance. I think the goal is to take the programmer completely out the circuit (Hi-Z) when not in use.

I wonder if, overall, it would be cheaper to use jumpers and logic chips with the 44pin CPLD instead of the 100pin one.
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Re: KT-Link/SWD SWV support

Reply #8
[quote author="ian"]Nice update! I'll probably follow suit soon.

Opps, JTAG_BUF_EN. It toggles the JTAG programming pins outputs or high impedance. I think the goal is to take the programmer completely out the circuit (Hi-Z) when not in use.

I wonder if, overall, it would be cheaper to use jumpers and logic chips with the 44pin CPLD instead of the 100pin one.[/quote]

Thanks for the explaining :)

I think I myself will go with the 100 pin CPLD. I don't think the benefit is that much (for me) and this way I have the bigger CPLD - which I like :)
Also using logic chips would mean that there are even more chips on the board which I have to route and to solder. And using more jumpers would cause me to have I don't know as much as maybe 5 jumpers? That would obfuscate the board a lot I think...

Nils

Re: KT-Link/SWD SWV support

Reply #9
One more tought:

I just read the "CPLD resources" thread and stumbled upon your entry:

[quote author="ian"]
Bus Blaster v2 has a CPLD instead of the 5 buffer chips. It is $5 cheaper @ 100. Instead of strugging finding the right combination of logic (like we did for over 6 months designing v1), we just drew this schematic and synthesized it for the CPLD:
[/quote]

I you start now with combining the CPLD with logic chips you have the same problem you were solving with the CPLD...

Another possibility is however to discard the KT-Link SWV support thing and concentrate on the plain JTAG functionality. SWD without SWV would still be supported because the only thing that needs the BBUS is the UART style SWV which isn't mandatory.

Nils

Re: KT-Link/SWD SWV support

Reply #10
I totally agree. I'm just thinking through the design possibilities. I really love this project :)

Bus Blaster v2 is already in production. It's a solid first design, and I'm really happy with it. It has everything that is (currently) supported by the target apps. We'll be able to whip up a KT-Link clone with everything but the SWV support.

Looking towards v3, it would be ideal to be able to clone the KT-Link (and bring the extra UART to a header, etc). My current solutions are either difficult or expensive, so my mind continues to grind on the options:
1. The current CPLD is $1 in 1s, the 100pin version is $4 + ~$2 extra to place and inspect the extra pins. That can be quite a cost difference at 500 or 1000 units (which has to be passed to the community). Maybe it is better to  have two versions, a light (v2) and a full (v3) at two different prices (just a thought)
2. Even with the bigger CPLD, a logic buffer chip is still needed. We need to share the JTAG B port between reprogramming the CPLD, and its use as serial IO and/or KT-Link support. We'll need a chip or jumpers to switch those connections. Too bad the JTAG pins aren't multi-purpose and activated by a programming pin :)

It would be perfect if:
1. There was no input-only pin on the coolrunner-ii, when we could use the 44 pin version
2.The XC9536XL had banks, it is the same without the input only pin, but it does not do voltage translation.
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Re: KT-Link/SWD SWV support

Reply #11
I think I like the possibility to have two different versions.

A  JTAG programmer, which should be buyable on good terms, should work for the most people. Having them to pay maybe $6 more because of a feature they don't ever use is maybe not so great.

But having the possibility to give a SWV supporting programmer to the ones who really needs it is a nice thing. And I think they will be willing to pay the $6 more to have the possibility. Maybe there could also be the option to populate some break out pin headers in the new version so one could be doing more with it than plain JTAG/SWD/SWV. Then one has even more for the higher price than only the SWV functionality.

I also think you could take the advantage of having the software support out there if you wait for it - the v2 is there as a JTAG programmer so the v3 can wait. And having the possibility to test it could be very nice ^^

One more thing: The only thing you can't implement at the moment is the plain UART style SWV - but maybe there will be an other mode you can implement? Maybe the plain UART style will be not-so-supported in for example OpenOCD. I don't know ^^. So it could be good to wait for the real software support...

I just got up so I'm still a little bit confused ;).

Nils

Re: KT-Link/SWD SWV support

Reply #12
It looks like I missed the commercial version:
http://search.digikey.com/scripts/DkSea ... 22-1409-ND

This is only $1 more than the 44 pin 64MCEL version. Still the extra pins to place and inspect, but maybe we can do it for a total additional cost of $5. My goal is still a $35 programmer, but maybe the 'pro' version is $40. It's also a more major CPLD development board too.

Sketch attached.
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