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Topic: Bus Blaster v2 (Read 31363 times) previous topic - next topic

Re: Bus Blaster v2

Reply #30
Thanks for the link, I added it to the CoolRunner-II quick start guide.

Dual edge is what I meant.

Would you say it's better to just do the cleanest-closest routing instead of trying to run the clock across the PCB to the GCK pin? It's actually some pretty ugly routing.
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Re: Bus Blaster v2

Reply #31
I would go for shortest route possible, without 90deg turns.

Re: Bus Blaster v2

Reply #32
Here's the v2 prototype I'm going to send today:
http://dangerousprototypes.com/docs/Bus ... #Version_2
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Re: Bus Blaster v2

Reply #33
I was just thinking ... could you add something like 100ohm resistor with 3v3 zener diode on the v_target route?  That would probably lead to adding some resistor networks on each output pin.

Or we should add big fat warning to the Wiki that this device can handle max 3.3volt logic on target side. (I don't see a big problem there, as most of the jtags are 3v3 or less).

Other than that... I am excited :)

Re: Bus Blaster v2

Reply #34
I already intended to add the series resistors, but it didn't get in in time to make the latest batch of PCBs (we send an order every 15th and 30th now). It will go in the first revision.

The idea about the zener is great! That protects the CPLD from over voltage too.
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Re: Bus Blaster v2

Reply #35
Hey robots - These PCBs can in yesterday. Can I send you one? The CPLDs should be here today, I can send one along too. I only have one extra FT2232 chip though.
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Re: Bus Blaster v2

Reply #36
Well, is it is able to come by 22nd, I might even get it before christmas :).
Ft2232h is a problem here around. I would have to shop at farnell or similar, and that would double the price of the chip (i don't have any bigger orders now), I wonder what other options are there.

Re: Bus Blaster v2

Reply #37
I'll need to order some stuff soon, I can get an extra for you. It will be a little while, because I think the order will be snail mail instead of fedex.
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Re: Bus Blaster v2

Reply #38
I have no problem waiting.  I just got message from school that my project is due to 2nd january. I think that needs to be taken care of first. :)

Re: Bus Blaster v2

Reply #39
Just finished the first prototype. So far so good. Ill make up a cpld design soon that imitates the jtag key front end and run it through the v1 tests.
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Re: Bus Blaster v2

Reply #40
to get you attracted: XILINX JTAG tools on Linux without proprietary kernel modules

no more jungo driver hassles and way more importand, it adds support for ft2232 based programmers!
http://www.rmdir.de/~michael/xilinx/

the discussion about the way to expensive xilinx jtag cables was in the other forum topic, but it seems for me, that i place it better here, else nobody will see it :-)

the driver works really well (we used them with original xilinx cables on 20-30 linux maschines in our university for years now) and as it is open source should be well adaptable to work with bus blaster v2.

the driver emulates the api from the original xilinx driver, so you have NO limitations, use impact, chipscope, download directly from ISE, debug your microblace code from EDK.

happy hacking :-)

Re: Bus Blaster v2

Reply #41
I can see teh CPLD with BBv1, but not the second JTAG interface of BBV2.

Any ideas how to use MPSSE2 module to program tthe CPLD? It looks like urjtag won;t support it out of the box. The Ti design we studied uses a custom utility to program with bitbang mode, maybe we should port that or do something similar.
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Re: Bus Blaster v2

Reply #42
Are you sure you didn't switch TDI/DO lines?  [s:]TDO on CPLD is data out, and on FT2232 it seems like Data out too. (its marked TDO/DI)[/s:]

EDIT: I must have been drunk 5 minutes ago :-)

Re: Bus Blaster v2

Reply #43
OK so here it comes again....

TDI/DO line on FT2232 is connected to TDO. Which is wrong.  (As TDO is data output on CPLD)
Also for TDO/DI, which is connected to TDI on CPLD. 

Re: Bus Blaster v2

Reply #44
[quote author="ian"]
Any ideas how to use MPSSE2 module to program tthe CPLD? It looks like urjtag won;t support it out of the box. The Ti design we studied uses a custom utility to program with bitbang mode, maybe we should port that or do something similar.
[/quote]

I can create patch for the UrJtag, which will add support for BBv2. (It should pretty easy as FT2232 programmers are already supported by UrJtag).

The Libusb driver mentioned earlier works by bitbanging Jtag lines, but might be on wrong port (B/A). So it might not work from impact.