Disclaimer: I have zero FPGA experience. I do have a logic sniffer though.
I often only use one or two channels and would find longer recording times very useful. On the logic sniffer hardware description page, I see mention of adding external RAM in the next design iteration. I ask this out of interest (and some ignorance): would it be possible to hang a SRAM or DRAM where this wing would usually go? I understand the FPGA bitstream would have to be rewritten to take advantage of this but I was wondering if these 16 I/O pins were capable of driving any kind of RAM at the speeds necessary for a logic probe. I would even sacrifice some top speed sampling rate for the increased recording time.