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Messages - emusic

Bus Blaster JTAG debugger / Re: Bus Blaster vs. Bus Pirate
[quote author="tayken"]It's not as flexible as BP.[/quote]
Of course BB is less flexible than BP because BB has no CPU on board. But it can serve any protocol that is compatible by signal set and clock/response rates.

[quote author="tayken"]That's why JTAGkey was developed, for JTAG.[/quote]
Surely, as well as LPT/Centronix port was developed solely for printer connections. :) But how many hundreds of projects use LPT as a free-form signal port? :)

[quote author="tayken"]Other uses are essentially using bitbanging to leverage new protocols[/quote]
All protocols (including JTAG) over BB use bitbanging because FTDI chips have no built-in protocol support (except RS232/USB, of course).
Bus Blaster JTAG debugger / Re: Bus Blaster vs. Bus Pirate
[quote author="tayken"]JTAG, nothing else, it's a big saw.[/quote]
It's not true. BB itself contains nothing that could make it a "JTAG debugger". It's simply an universal interface with a signal set compatible with JTAG. Programmed with JTAGKey buffer logic, it can be primarily used for JTAG debugging but only because BB-aware software products (OpenOCD & UrJTAG) are JTAG debuggers.

But since BB is nothing more than a bitbang buffer, it can perform virtually any interface operation for which its signal set is enough, if there is an appropriate host software. For example, with JTAGKey buffer logic, it can be used as AVR programmer with avrdude, as SPI flash IC programmer with flashrom and so on.
Bus Blaster JTAG debugger / BB v3c and in-circuit SPI flash programming
Just tried to in-circuit read/write MX25L3206E flash in small "MIFI" router

Connected BB v3c to the IC using a clip with a short DIP-to-SPI cable.

Unfortunately, works very unreliably because CS and SCLK lines of the IC are hardly pulled up and BB due to its output buffer resistors cannot pull them down to the ground (resulting voltage is 2-2.5 V).

Using AsProgrammer (a Russian tool) and USBASP flashed with special AsProgrammer firmware, was able to read/write the IC in-circuit. But AsProgrammer is extremely slow (9 min to read 4MB flash, 25 min to erase-write-verify).

So added two 2N3906 emitter followers to CS/SCLK (200-Ohm resistors from TMS/TCK to bases) and now it works fine and reliably with BB/flashrom, starting from clock divisor 8 (2..4 are unreliable). Less than a minute for full 4MB flash read.
Bus Blaster JTAG debugger / Re: Where to get v3 buffer logic SVF files?
Found that the main JTAGKey CPLD logic (BBV3-JTAGkey-selftest-v1.1.svf, 31080 bytes) found here has a problem with TMS signal delivery.

Initially, flashrom v0.9.6.1-r1704/Win32 could not detect MX25L8005 IC. With a scope, found that flashrom forms a bad clock signal, fixed it with -p ft2232_spi:type=busblaster,divisor=8. Clock signal became good and the IC started to be detected some times but not stable. Looking at all SPI protocol with a logic analyzer, saw that TMS is not asserted at all.

Tried another CPLD logic (bbv3_jtagkey.svf, 30416 bytes) from this post and TMS works fine, flashrom detects the IC in all cases, and successfully reads it.

Also tried two other CPLD logics (bbv3-jtagkey.svf and bbv3-passthrough.svf, 29894 bytes each) from this post, both have TMS working good.

Since flashrom has exactly the same bitbang parameters for both "jtagkey" and "busblaster" (the only difference is USB PID), I'm afraid that self-test buffer configuration has a bug in TMS connection/activation.

BTW, AVRDUDE 5.11-Patch7610/Win32 works fine with ATMega8 on all four buffer configurations but complains about RESET line. AFAIK AVR programming can be performed with RESET line always low so it isn't a problem.
Bus Blaster JTAG debugger / Re: Where to get v3 buffer logic SVF files?
[quote author="ian"]
How about:
-p ft2232_spi:type=jtagkey[/quote]

Tried that but flashrom complains "Unable to open FTDI device: -3 (device not found)." I'm afraid it tries to find native JTAGKey's VID/PID. In flashrom docs, I found no way to specify VID/PID for a device.

And "ft2232_spi:type=busblaster" (as well as "ft2232_spi:type=2232H,port=A") allows flashrom to recognize BB only if Serial Interface A device is converted to a libusb device.
Bus Blaster JTAG debugger / Re: Where to get v3 buffer logic SVF files?
After three-day experiments and looking for software that can work with SPI targets via BB v3c, was able to read/write ATMega8 with avrdude.

Unfortunately, flashrom with "-p ft2232_spi:type=busblaster" recognizes BB (channel A is converted to libusb device with inf-wizard) but does not detect and/or recognize MX25L8005 SPI flash IC. The IC is soldered to a self-made 10-pin SPI connector. Plugging this connector into USBASP 2.0, I can read and write the flash using AsProgrammer. Connecting BB to USBASP with another self-made cable, I can read and write ATMega8 on USBASP. Thus, all connections are made properly.

Don't know what works incorrectly, flashrom or BB.
Bus Blaster JTAG debugger / Success: using v3c as AVR programmer
Got success working with ATMega8 under 64-bit Windows 7.


  • Bus Blaster v3c.
  • Self-made 20-to-10 pin cable.
  • USBASP 2.0 board with SP2 self-programming jumper soldered and closed.


  • FTDI 2.10.00 driver pack installed.
  • Buffer logic programmed with BBV3-JTAGkey-selftest-v1.1.svf file.
  • libusb installed, FT2232 Serial Converter A replaced by libusb device (using inf-wizard).
  • avrdude 5.11-Patch7610 installed.

With "-c 2232HIO", avrdude successfully recognizes, reads and writes ATMega8 on USBASP board.

Unfortunately,  avrdude (and flashrom) does not recognize BB if interface A is not converted to libusb device with inf-wizard. avrdude 6.x Win32 binaries have no avrftdi/libusb support so I cannot test them.

To revert back to Serial Converter A, just delete libusb device in Device Manager (don't check "Delete the driver software") and rescan the hardware (or re-plug BB).
Bus Blaster JTAG debugger / Re: Where to get v3 buffer logic SVF files?
Thank you for explanation. So should BBV3-JTAGkey-selftest-v1.1.svf file work as a normal JTAGKey buffer while P28 is free and as a self-test buffer while P28 is shorted?

If yes, I think it would be better to update v3 description. In the self-test description chapter, there is the warning:

"We highly recommend users upgrade to a non-selftest buffer immediately."

So I thought there is a separate SVF file for normal usage.

Should UrJtag recognize BB's own CPLD on interface 0 if JTAG header is externally wired to JP1?
Bus Blaster JTAG debugger / Self-test with external connection to own CPLD in v3
In this post (in Russian), a guy uses an external connection between JTAG header and BB's own CPLD (JP1) as a self-test to check new JTAG software. If XILINX device is successfully detected, the software seems to be working properly, as BB's buffer too.

With my v3c, I cannot get it working with UrJtag 0.10 and any of v3 SVF files found here. Watching signals with a scope, I see TMS is asserted low, TCK produces a clock signal, TDI is altered too (but shows only short positive spikes) but TDO is constantly high or low.

Native BB's self-test works properly with BBV3-JTAGkey-selftest-v1.1.svf.

Could it be due to some FT2232-CPLD connection changes in v3 from v2?
Bus Blaster JTAG debugger / Re: Where to get v3 buffer logic SVF files?
Unfortunately, still no success. Tried to connect MX25L8005 flash IC, ran detection with buffers configured by various v3 SVF files found here but IC does not respond at all (TDO is not changed, watched with a scope). Changed frequency from 100000 to 1000000, no difference. TMS is asserted low, TCK produces a good clock signal, TDI shows short high level spikes but TDO is contantly at low level.

Saw a post (cannot insert the link because of a new account) where a guy used BB with JTAGKey buffer and UrJtag 0.10 to program ATMega169. In his case, UrJtag successfully communicates with the IC and detects Atmel manufacturer. So I connected a working USBASP board having ATMega8, shorting JP2 (self-programming mode). In such mode, I can successfully program the board with any AVR programmer. Being connected to BB, the board gets power, TMS assertion puts it to serial programming mode (TMS is connected to RESET), TCK/TDI produce their signals but TDO does not change at all, being at low level.

Tried AVRDUDE 5.11 that supports FTDI but it does not detect FT2232H under Windows. It is a known issue.

Self-test still performs fine if the buffer programmed by BBV3-JTAGkey-selftest-v1.1.svf.

I'm afraid v3 is less stable than v2. Many v3 users complain about interfacing problems but most v2 users have no problems.