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1
General discussion / Re: Tips to read eeprom memory 24C44
It seems that there is no other simpler way to handle the 3WIRE mode since this 24C44 memory goes out of the standards by obtaining D0 without needing a pulse clock, that is, only 23 clock pulses are needed and not 24 to read a word.
I've been capturing the talk between the buspirate and the OLS 4-channel CSI24C44 memory using pulseview and discovered a bug in the sigrok X2444M/P decoder.
In the screenshots that I attach, it is seen that when sending the RCL command [0x85] there are no problems, pulseview shows it well. But when reading the last word 0xF it gets ugly wrong, showing the word read from the beginning of the first clock pulse, when it should be taken from bit 8 to bit 23 of the clock.
In the third capture I have added yellow bars and comments in orange and red to facilitate reading and demonstrate how wrong the X2444M/P plugin is.
I know that this type of archaic memories are very little seen and used, hence there is not much feedback to correct the bugs ... looking through the sigrok page there I finished finding out where the bugs should be reported.

The x2444m plugin is made in python, I understand something but not all the context in which the plugin works in sigrok.

Code: [Select]
# updatedb
$ locate x2444m
/usr/share/libsigrokdecode/decoders/x2444m/__init__.py
/usr/share/libsigrokdecode/decoders/x2444m/pd.py

RCL shipping.

Code: [Select]
3WIRE[-/\_/\_/\_/\_/\-/\_/\-/\]

I send READ 0xF, the word written in memory at address 0xF is 0x1F1E.

Code: [Select]
3WIRE[-/\-/\-/\-/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]

Attached a screenshot of ponyprog-3.1.2 using SI-ProgAPI by serial port /dev/ttyS0 reading the same memory CSI24C44.

Greetings.
2
General discussion / Tips to read eeprom memory 24C44
My intention is to manage this 24C44 eeprom memory to then do the routines with a pic.
The project is to revive an old team that is made with a motorola microcontroller, which I will replace with a pic.
To make things easier, I started by creating a map with data in ascending sequence of hex values and write it with the
minipro programmer that supports this type of memory.

The memory is 16 words ... very small, but it has a cache system in RAM, with the RCL command you copy
from the eeprom cells to the cache RAM.
It does not have an upward direction pointer and can only be read/write one word at a time indicating the direction of the word
to read/write.

Reading in 32x8 bytes mode.

Code: [Select]
$ minipro -p X24C44 -r- |hexdump -Cv
Found TL866II+ 04.2.124 (0x27c)
Reading Code...  0.01Sec  OK
00000000  00 01 02 03 04 05 06 07  08 09 0a 0b 0c 0d 0e 0f  |................|
00000010  10 11 12 13 14 15 16 17  18 19 1a 1b 1c 1d 1e 1f  |................|

Reading in 16x16 words mode.

Code: [Select]
$ minipro -p X24C44 -r- |hexdump -v
Found TL866II+ 04.2.124 (0x27c)
Reading Code...  0.01Sec  OK
0000000 0100 0302 0504 0706 0908 0b0a 0d0c 0f0e
0000010 1110 1312 1514 1716 1918 1b1a 1d1c 1f1e

I used buspirte 4 to investigate this issue using 3WIRE mode with the following connection diagram.

Code: [Select]
| Bus Pirate v4.0  | Dir. | CSI24C44 | Description                     |
|------------------|------|----------|---------------------------------|
| CS   red/violet  | →    | CE       | Chip Select                     |
| CLK  white/white | →    | SK       | Clock signal                    |
| MOSI black/black | →    | DI       | Master Out, Slave In            |
| MISO yellow/grey | ←    | DO       | Master In, Slave Out            |
| GND  white/white | ---  | GND      | power ground                    |
| N.C              | +    | RECALL   | jump to VCC (RCL only command)  |
| N.C              | +    | STORE    | jump to VCC (STO only command)  |
| +5   black/black | +    | VCC      | +5v power source                |


Code: [Select]
$ minicom -D /dev/ttyACM0
Welcome to minicom 2.7
Port /dev/ttyACM0, 20:23:20

HiZ>m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. KEYB
9. PIC
10. DIO
x. exit(without change)

(1)>7
Set speed:
 1. ~5KHz
 2. ~50KHz
 3. ~100KHz
 4. ~400KHz

(1)>4
CS:
 1. CS
 2. /CS *default

(2)>2
Select output type:
 1. Open drain (H=Hi-Z, L=GND)
 2. Normal (H=3.3V, L=GND)

(1)>2
Clutch disengaged!!!
To finish setup, start up the power supplies with command 'W'
Ready

3WIRE>W
POWER SUPPLIES ON
Clutch engaged!!!

3WIRE>i
Bus Pirate v4
Community Firmware v7.1 - colodes 19-02-2021 [HiZ 1-WIRE UART I2C SPI 2WIRE 3WIRE KEYB PIC DIO]
DEVID:0x1019 REVID:0x0003 (24FJ256GB106 A5)
http://dangerousprototypes.com
CFG0: 0xFFFF CFG1:0xFFFF CFG2:0xFFFF
*----------*
Pinstates:
#12     #11     #10     #09     #08     #07     #06     #05     #04     #03     #02     #01  
GND     5.0V    3.3V    VPU     ADC     AUX2    AUX1    AUX     CS      MISO    CLK     MOSI
P       P       P       I       I       I       I       I       O       I       O       O      
GND     4.91V   3.48V   0.00V   0.00V   H       H       H       H       H       L       L      
POWER SUPPLIES ON, Pull-up resistors OFF, Normal outputs (H=3.3v, L=GND)
MSB set: MOST sig bit first, Number of bits read/write: 8
a/A/@ controls CS pin
R3W (spd csl hiz)=( 3 1 0 )
*----------*

First you must send the RCL command [0x85] that copies the 16 words from the eeprom to RAM, otherwise only all zeros will be read.

Code: [Select]
3WIRE[-/\_/\_/\_/\_/\-/\_/\-/\]

This is the table to read from word 0 to word F.

Code: [Select]
3WIRE[-/\_/\_/\_/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  0 -> 0100
3WIRE[-/\_/\_/\_/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  1 -> 0302
3WIRE[-/\_/\_/\-/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  2 -> 0504
3WIRE[-/\_/\_/\-/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  3 -> 0706
3WIRE[-/\_/\-/\_/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  4 -> 0908
3WIRE[-/\_/\-/\_/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  5 -> 0b0a
3WIRE[-/\_/\-/\-/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  6 -> 0d0c
3WIRE[-/\_/\-/\-/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  7 -> 0f0e
3WIRE[-/\-/\_/\_/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  8 -> 1110
3WIRE[-/\-/\_/\_/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  9 -> 1312
3WIRE[-/\-/\_/\-/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  a -> 1514
3WIRE[-/\-/\_/\-/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  b -> 1716
3WIRE[-/\-/\-/\_/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  c -> 1918
3WIRE[-/\-/\-/\_/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  d -> 1b1a
3WIRE[-/\-/\-/\-/\_/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  e -> 1d1c
3WIRE[-/\-/\-/\-/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]  f -> 1f1e

The secret of memory 24C44 is that it delivers the first bit D0 (LSB) when descending the eighth clock pulse, at the end of sending the READ 11x command.
For bit D0, no clock pulse is needed, for bits 1 to 15 clock pulses are sent, and each bit is read after each clock pulse falls.

The confusing part of this whole mess is that memory first sends the D0 LSB that order it cannot be changed in the interpretation by the buspirate, since the l/L
command does not work ... does not exchange the order of the bits read to present them properly In the terminal.
This function has the ponyprog 3.0 ported to QT and is called ByteSwap.
How difficult would it be to add it? since it is very confusing to interpret the bit order just by observation at the terminal.

The map obtained is identical to the one obtained using minipro.

Code: [Select]
0000000 0100 0302 0504 0706 0908 0b0a 0d0c 0f0e
0000010 1110 1312 1514 1716 1918 1b1a 1d1c 1f1e

As an example, I paste the reading of the word F which should give a read value of 0x1f 0x1e.

Code: [Select]
3WIRE>[-/\-/\-/\-/\-/\-/\-/\_/\./\./\./\./\./\./\./\./\./\./\./\./\./\./\./\.]
CS ENABLED
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 1
CLOCK, 1
CLOCK, 0
DATA OUTPUT, 0
CLOCK, 1
CLOCK, 0
DATA STATE: 0CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 0CLOCK, 1
CLOCK, 0
DATA STATE: 0CLOCK, 1
CLOCK, 0
DATA STATE: 0CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 1CLOCK, 1
CLOCK, 0
DATA STATE: 0CLOCK, 1
CLOCK, 0
DATA STATE: 0CLOCK, 1
CLOCK, 0
DATA STATE: 0/CS DISABLED
3WIRE>

Let's see if anyone has experiences with the 3WIRE mode and tells me how else this can be done more simply.

Greetings.
3
Open Bench Logic Sniffer / Re: shasum of winbond 25x40
A few months passed, I hope you have not forgotten your post!

The last package for OLS that I have found is version 3.0.8 in this link:
http://www.gadgetfactory.net/logicsniffer/index.php?n=LogicSniffer.Download
I use linux so download the Linux Expert what does not Include JRE

There are two executables, one (fw_update) to update the PIC18FJ50 firmware and the other (ols-loader) to update
the W25X40VB memory with the synthesis for the FPGA.

In Linux, USB devices of the standard communication class are created with the name /dev/ACM*
To see the current state of OLS, 00 = OK

Hold down the UPDATE button, then press the RESET button, now release both, the ACT led will turn on steady.
Enter bootloader mode.

Code: [Select]
$ ./ols-loader -p:/dev/ttyACM0 -boot
Logic Sniffer ROM loader v0.3 (November 9, 2010)
Opening serial port '/dev/ttyACM0' @ 921600 ... OK
Found OLS HW: 1, FW: 3.0, Boot: 2
Found flash: WINBOND W25X40
OLS switched to bootloader mode

USB ID should change from 04d8: fc92 to 04d8: fc90

Code: [Select]
$ lsusb
Bus 007 Device 041: ID 04d8:fc92 Microchip Technology, Inc. Open Bench Logic Sniffer
$ lsusb
Bus 007 Device 063: ID 04d8:fc90 Microchip Technology, Inc. Diolan
Code: [Select]
$ ./ols-loader -p:/dev/ttyACM0 -status
Logic Sniffer ROM loader v0.3 (November 9, 2010)
Opening serial port '/dev/ttyACM0' @ 921600 ... OK
Found OLS HW: 1, FW: 3.0, Boot: 2
Found flash: WINBOND W25X40
OLS status: 00
To self-test and see the hardware versions of the OLS board and the firmware in the pic.

Code: [Select]
$ ./ols-loader -p:/dev/ttyACM0 -selftest
Logic Sniffer ROM loader v0.3 (November 9, 2010)
Opening serial port '/dev/ttyACM0' @ 921600 ... OK
Found OLS HW: 1, FW: 3.0, Boot: 2
Found flash: WINBOND W25X40
done...
Passed self-test :)

Update the firmware of the PIC15FJ50 to the latest version available which is v3.0
Code: [Select]
$ ./fw_update -e -w -m flash -vid 0x04D8 -pid 0xFC90 -ix OLSv1.firmware.v3.0.hex
U2IO flash erasing: DONE.
U2IO flash programming: DONE.
RESET Device
Operation successfully completed.


Update the W25X40VB memory with the latest version of the available synthesis, for the Xilinx Spartan-3E 250 FPGA, which is v3.0.7.
Hold down the UPDATE button, then press the RESET button, now release both, the ACT led will turn on steady.
Code: [Select]
$ ./ols-loader -write -erase -p:/dev/ttyACM0 -wB:logic_sniffer_3.07-Demon-Core.bit
Logic Sniffer ROM loader v0.3 (November 9, 2010)
Opening serial port '/dev/ttyACM0' @ 921600 ... OK
Found OLS HW: 1, FW: 3.0, Boot: 2
Found flash: WINBOND W25X40
Chip erase ... done :)
Reading BIN file 'logic_sniffer_3.07-Demon-Core.bit' ... OK! (binary size = 169314)
Will write 662 pages
Page 0x0000 write ... (0x0000 0x0000)OK
Page 0x0001 write ... (0x0000 0x0001)OK
....
....
Page 0x0294 write ... (0x0002 0x0094)OK
Page 0x0295 write ... (0x0002 0x0095)OK


Gets a current copy of memory.
Code: [Select]
$ ./ols-loader -read -p:/dev/ttyACM0 -rB:backup-current-logic_sniffer-Demon-Core.bit
Logic Sniffer ROM loader v0.3 (November 9, 2010)
Opening serial port '/dev/ttyACM0' @ 921600 ... OK
Found OLS HW: 1, FW: 3.0, Boot: 2
Found flash: WINBOND W25X40
Will read 1024 pages
Page 0x0000 read ... OK
Page 0x0001 read ... OK
....
....
Page 0x03fe read ... OK
Page 0x03ff read ... OK
Writing BIN file 'backup-current-logic_sniffer-Demon-Core.bit' ... done!

Code: [Select]
$ ls -l backup-current-logic_sniffer-Demon-Core.bit
-rw-r--r-- 1 user user 262144 feb 20 04:11 backup-current-logic_sniffer-Demon-Core.bit

As you can see, the sha256sum are not the same, does the pic provide something to modify it, maybe a checksum or CRC or something like that?
Code: [Select]
$ sha256sum backup-current-logic_sniffer-Demon-Core.bit 
e16ede2e14eed7f4fdff321d02c894d0778ab1f4766e7139473753fcbd99e69f  backup-current-logic_sniffer-Demon-Core.bit

$ sha256sum logic_sniffer_3.07-Demon-Core.bit
bbe2ed55a44bb0e6acc4eb1aa814cc96328542fdcd480b324eca9d212a0bafdd  logic_sniffer_3.07-Demon-Core.bit

I have removed the memory from the board and read it with the buspirate V3.5C.
Code: [Select]
$ flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -c "W25X40" -r buspirate-V3.5C-OLS-V1.04-original-00.bin
Found Winbond flash chip "W25X40" (512 kB, SPI) on buspirate_spi.
Reading flash... done.

$ sha256sum buspirate-V3.5C-OLS-V1.04-original-00.bin
1b98a7d77e63e33292c99abf57a5753f1274a3eb6b5f98243218b95fbc5b4742  buspirate-V3.5C-OLS-V1.04-original-00.bin

Observe that it reports with sigrock-cli.
Code: [Select]
$ sigrok-cli --driver ols:conn=/dev/ttyACM0 --scan
The following devices were found:
ols - Open Logic Sniffer v1.01 FPGA version 3.07 with 32 channels: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Code: [Select]
$ sigrok-cli --driver ols:conn=/dev/ttyACM0 --show
Driver functions:
    Logic analyzer
Scan options:
    conn
    serialcomm
ols - Open Logic Sniffer v1.01 FPGA version 3.07 with 32 channels: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Supported configuration options:
    Maximum number of samples: 0
    samplerate (10 Hz - 200 MHz in steps of 1 Hz)
    Supported triggers: 0 1
    captureratio: 0 (current)
    external_clock: on, off
    pattern: None (current), External, Internal
    swap: on, off
    rle: on, off (current)

Everything will depend on what version you have in your OLS to be able to compare with this data.
Greetings.
4
Bus Pirate Development / Re: Bus Pirate - Community Firmware 7.0
It seems that everything has gone well for me, clone the git and compile for BP3 and BP4, I just changed #define BF_FIRMWARE_STRING in base.h
to refer to the compilation date.
Don't use bootloaders and program directly with pickit2,
Everything was accomplished with mplabx 4.20 and XC16 V1.35.

$ pk2cmd -P PIC24FJ256GB106 -M -F busPirate.X.production.hex
Using PE
PICkit 2 Program Report
19-2-2021, 4:55:03
Device Type: PIC24FJ256GB106
Program Succeeded.
Operation Succeeded

$ pk2cmd -P PIC24FJ64GA002 -M -F busPirate.X.production.hex
Using PE
PICkit 2 Program Report
19-2-2021, 5:22:57
Device Type: PIC24FJ64GA002
Program Succeeded.
Operation Succeeded

$ minicom -D /dev/ttyACM0
HiZ>i
Bus Pirate v4
Community Firmware v7.1 - colodes 19-02-2021 [HiZ 1-WIRE UART I2C SPI 2WIRE 3WIRE KEYB PIC DIO]
DEVID:0x1019 REVID:0x0003 (24FJ256GB106 A5)
http://dangerousprototypes.com
HiZ>

$ minicom -D /dev/ttyUSB0
HiZ>i
Bus Pirate v3.5
Community Firmware v7.1 - colodes 19-02-2021 [HiZ 1-WIRE UART I2C SPI 2WIRE 3WIRE PIC DIO] Bootloader v255.255
DEVID:0x0447 REVID:0x3043 (24FJ64GA00 2 B5)
http://dangerousprototypes.com
HiZ>

I will be talking with a 24C44 and with a DS18S20 and reporting if I find problems.
Greetings.
5
Bus Pirate Development / Re: Bus Pirate - Community Firmware 7.0
Hi guys, since 2012 I bought the buspirate V3.5C and the buspirate V4.0
Several times update the firmwares, but always return to firmware version v6.2-beta1 r1981.
By mid-2018 I had loaded the bpv3_fw7.11_opt1_12062018.hex but then went back to v6.2-beta1 r1981.
I have a pickit2 which I use from console with pk2cmd.
I wonder if you could not include the bootloader and load the firmware directly with pickit2, for both buspirates.
And what would be the current firmwares to test ... I would have to download a new mplabx, since I have the old mplabx 4.20 running on wine
In this state I am now with both buspirates.

pickit2 identify to ICSP buspirate V3.5C
$ pk2cmd -P -I
Auto-Detect: Found part PIC24FJ64GA002.
Device ID = 0447
Revision  = 3043
Device Name = PIC24FJ64GA002
Operation Succeeded


$ ls -l /dev/ttyUSB0
crw-rw---- 1 root plugdev 188, 0 feb 18 19:52 /dev/ttyUSB0

$ minicom -D /dev/ttyUSB0
HiZ>i
Bus Pirate v3.5
Firmware v6.2-beta1 r1981  Bootloader v4.4
DEVID:0x0447 REVID:0x3043 (24FJ64GA002 B5)
http://dangerousprototypes.com
HiZ>m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. LCD
x. exit(without change)

(1)>



pickit2 identify to ICSP buspirate V4.0
$ pk2cmd -P -I
Auto-Detect: Found part PIC24FJ256GB106.
Device ID = 1019
Revision  = 0003
Device Name = PIC24FJ256GB106
Operation Succeeded

$ ls -l /dev/ttyACM0
crw-rw---- 1 root uucp 166, 0 feb 18 19:54 /dev/ttyACM0

$ minicom -D /dev/ttyACM0
HiZ>i
Bus Pirate v4
Firmware v6.2-beta1 r1981
DEVID:0x1019 REVID:0x0003 (24FJ256GB106 A5)
http://dangerousprototypes.com
HiZ>m
1. HiZ
2. 1-WIRE
3. UART
4. I2C
5. SPI
6. 2WIRE
7. 3WIRE
8. KEYB
9. LCD
10. PIC
11. DIO
x. exit(without change)

(1)>

Greetings.