Logic Pirate

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The Logic Pirate is an inexpensive, yet capable open source logic analyzer. It is designed to support the SUMP logic analyzer protocol.

Get one for $30 Logic pirate.jpg Here are some of its features:

  • 8 channels
  • 256 kSamples recording size
  • 60 MHz (overclocked) sampling rate (20 MHz and lower non-overclocked)
  • No compromise when combining the values above
  • Simple configurable edge detection triggers on all inputs (simple OR trigger)
  • Configurable ratio of samples from before and after the trigger (rolling sample buffer)
  • 5 V tolerant inputs (LOW-level voltage < 0.8 V, HIGH-level voltage > 2.0 V)
  • About 500 kB/s transfer speed to the PC (256 kSamples take about 0.5 seconds)
  • Data capturing can be stopped from the host software anytime
  • Cross platform host software for Windows, OS X, and Linux
  • DIY-friendly 0603 parts and SOIC packages used on a 2-layer board
  • On board 3.3 V regulator can supply up to 400 mA to an external circuit
  • Tiny 3cm x 3cm PCB
  • Firmware updates via built-in USB bootloader
  • Probe cables and acrylic case available from Seeed Studio
  • Open source PCB (EAGLE) and firmware files

Some features of the host software:

  • Precise measurement by using up to ten free placeable cursors
  • Automatic period, frequency, and duty cycle measurement
  • Displaying channel groups as HEX values and/or as an analog signal
  • Analyzers for a large number of protocols: 1-Wire, I2C, JTAG, SPI, UART, etc.


About Overclocking

The Logic Pirate uses serial SRAM chips to store the sample data. These chips are rated at 20 MHz. USB communication with the host computer and controlling of the SRAMs is done using a PIC32 microcontroller (MCU) which is rated at 40 MHz.

Overclocking the serial SRAMs

Like CPUs on computer mainboards, the chips on the Logic Pirate can be overclocked. The manufacturer of the chips must be conservative on the specified ratings to ensure that the chips function correctly over the whole temperature range.

We did some tests, and the SRAMs worked fine up to 80 MHz at room temperature. At even higher frequencies the chips were only loosing a clock cycle now and then, but were not harmed otherwise. Even having them running overclocked for several hours did not show any increase in the package temperature.

The regular Logic Pirate firmware allows to specify the following sample rates in the host application:

Sample Rates
40 MHz* 20 MHz 10 MHz
5 MHz 2 MHz 1 MHz
500 kHz 200 kHz 100 kHz
50 kHz 20 kHz 10 kHz
5 kHz 2 kHz

* overclocked SRAM

Although it is very likely that the SRAM chips on your Logic Pirate have no problem being overclocked at 40 MHz, please understand that we cannot guarantee their functionality beyond the rated 20 MHz.

Overclocking the PIC32

An alternative firmware for the Logic Pirate is available which also overclocks the PIC32. Microchip recently increased their specified rating from 40 MHz to 50 MHz. We did some tests on several 40 MHz models and all worked fine up to 72 MHz. The alternative firmware clocks the PIC32 at 60 MHz. By also using an alternative configuration in the host application, the following sample rates can be selected:

Sample Rates
60 MHz* 30 MHz* 15 MHz 10 MHz
5 MHz 2 MHz 1 MHz
500 kHz 200 kHz 100 kHz
50 kHz 20 kHz 10 kHz
5 kHz 2 kHz

* overclocked SRAM

Although we have not experienced any problems or even damage when using the overclocked firmware, please understand that overclocking is done at your own risk.


To be able to switch between the regular and the overclocked firmware, or to update the firmware in case a new revision of it has been released, the Logic Pirate uses a bootloader.

The bootloader is executed every time the Logic Pirate is connected to the host computer. If no enter-update-mode condition is detected, the bootloader exits and starts the firmware. Otherwise it enters the update mode and a new firmware can be uploaded.

The bootloader always runs the PIC32 at safe 40 MHz, so changing back from the overclocked firmware to the regular one is always possible. The overclocked firmware dynamically switches the PIC32 to 60 MHz, but only after the bootloader has exited.

Entering Update Mode

To enter update mode please disconnect the Logic Pirate from the host computer. Then, place a jumper or jumper wire from the TEST pin to the 3.3V pin. When the Logic Pirate is reconnected to the host computer again, the LED will blink about two times per second to indicate that the bootloader is running.

Logic pirate jumper.jpg Logic pirate jumper wire.jpg

Uploading the new Firmware

Start the bootloader application PIC32UBL.exe from the download below on your PC and check the Enable checkbox (1) in the USB group. Click the Connect button (2) and load the desired firmware (logic_pirate_40_MHz.hex or logic_pirate_60_MHz.hex) by pressing the Load Hex File button (3). Upload the firmware using the Erase-Program-Verify button (4), and you are done. Remove the jumper wire and disconnect and reconnect the Logic Pirate from the USB port.

Don't forget to select the corresponding Device type in the OLS Logic Analyzer Client: Logic Pirate (40 MHz) or Logic Pirate (60 MHz).

Logic pirate bootloader.png

Installing the Host Software

OLS Logic Analyzer Client

Logic sniffer logo.png

The recommended host software is JaWi's cross platform Logic Sniffer Java client. Support for the Logic Pirate is included since version 0.9.7. (Provided by the two config files ols.profile-logicpirate-40.cfg and ols.profile-logicpirate-60.cfg in the plugins directory.) Java must also be installed if it is not already present on the computer.

.inf File

The virtual serial port (CDC) is an open standard, it should work out of the box on any modern operating system (Linux, OS X, Windows 10).

For earlier Windows versions, you need to tell Windows how to use the device. You don't need a driver, but you will need a .inf file. A suitable .inf file is included in the download below. Right-click on it and select Install from the context menu.

If you are using Windows 8, read this note about how to install an .inf file.

Using the Logic Pirate

Once connected to the host computer, the Logic Pirate uses an LED to indicate its status:

LED Status
breathing The LED fades in a "breathing" rhythm to indicate that the Logic Pirate is ready.
flickering When sampling is started the LED flickers about 15 times per second to indicate that the Logic Pirate is waiting for the trigger condition to occur.
shining After the trigger condition occurred (or if no trigger condition was used) the LED constantly shines while the sample buffer is filled up.
turned off While transferring the sampled data to the host computer, the LED is turned off. This should take well below one second.

Using the OLS Logic Analyzer Client

Select Capture -> Begin capture or the corresponding toolbar button (1) to open the OLS Capture settings dialog.

Logic pirate ols main window.png

Choose the correct Analyzer port (2) and the Device type Logic Pirate (40/60 MHz) (3) matching the firmware used.

Logic pirate ols connection.png

In the Acquisition tab the Sampling rate (4) and the Recording Size (5) can be changed.

Logic pirate ols acquisition.png

Finally, if desired, in the Trigger tab enable the Trigger checkbox (6), set the Before/After ratio (7), and further check the Mask 0-7 boxes (8) corresponding to the respective channels.

Logic pirate ols triggers.png

The trigger is a very simple OR trigger. Any match on any configured pin will trigger the capture.

The OLS Logic Analyzer Client is a very powerful piece of software, which gets continuously improved by its maintainer. Advanced features not discussed here are for example the analyzers for a large number of protocols: 1-Wire, I2C, JTAG, SPI, UART, etc.

Changing the TEST Pin Frequency

The TEST pin provides a 1 kHz square signal with a 75 % duty cycle by default. This signal can be used to test the Logic Pirate channels or to drive an external circuit.

The frequency (2 Hz .. 10 MHz) and duty cycle (0 % .. 100 %) of the test signal can be changed by sending some custom commands to the Logic Pirate. An example Python script set_test_pin.py is provided in the download below. Examine the script for further details.

Design Overview

The design of the Logic Pirate is based on the design of the Logic Shrimp. The principle of operation is quite similar, and you can read about it here in more detail.

Notable differences are:

  • A faster PIC32 microcontroller allows shorter transfer times of the acquired data to the host application. Typically 0.5 seconds for 256 kSamples or less for smaller sample buffers can be achieved.
  • Two serial SRAM chips are used in SQI (Serial Quad Interface) configuration to simultaneously capture 8 channels per sample.
  • The serial SRAM chips are clocked by the REFCLKO output of the PIC32, which allows flexible clock rates from 2 kHz up to the internal core frequency of 40 MHz (60 MHz overclocked).


The schematic and PCB were designed with the free version of Cadsoft Eagle.

Logic pirate schematic.png

Parts List

Quantity Comment Package Designator
2 1 uF, ceramic 0603 C1, C2
1 10 uF, ceramic or tantalum 1206 C3
5 0.1 uF, ceramic 0603 C4, C5, C6, C7, C8
1 10 kR 0603 R1
1 330 R 0603 R2
1 LED, yellow 0603 LED1
1 MCP1825S-3302E/DB SOT-223 VREG1
2 23LC1024-I/SN SOIC IC2, IC3
1 74LVC573 SOIC IC4
1 CSTCE8M00G55-R0 (8 MHz resonator) X1
1 2x6 2.54 mm pin header straight J1 + J2
1 Micro-B USB receptacle (mind footprint) USB
1 PCB, FR4, 1.6 mm, 3x3 cm



Logic pirate acrylic case.png Logic pirate probe cables.png