CPLD programming with Bus Blaster, urJTAG, and SVF files

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Bus-blaster-v2-inuse .jpg

urJTAG can be used with the Bus Blaster or FT2232 breakout to program a CPLD or FPGA using a SVF file.

Download and install the drivers:

Download and install urJTAG:

Locate a BSDL definition file for the device from the manufacture or with a web search.


urJTAG does not seem to work with the XC9572XL CPLD.
We expect a fix eventually.



Connect the programmer and start urJTAG.

jtag> cable jtagkey
Connected to libftd2xx driver.

On GNU/Linux use:

jtag> cable ft2232 pid=0x6010 vid=0x403 interface=1
Connected to libftdi driver.

Select the Bus Blaster programmer.

jtag> detect
IR length: 8
Chain length: 1
Device Id: 00000110111001011110000010010011 (0x0000000006E5E093)
 Manufacturer: Xilinx
 Part(0):         XC2C64-VQ44
 Stepping:     0
 Filename:     c:\program files\urjtag\data/xilinx/xc2c64a-vq44/xc2c64a-vq44

Enumerate the device.

jtag> svf c:\svf\example.svf progress stop
Parsing    660/663 ( 99%)
Scanned device output matched expected TDO values.

Now play the SVF file to program the device.

  • Copy the .SVF file to a directory
  • Run the SVF file with options show progress and stop on errors


jtag> bsdl path c:\bsdl
  • Some devices may need a BSDL file to be recognized.
  • Copy the bsdl file to c:\bsdl, or change the location in the bsdl path command.
  • Tell urJTAG were to find it as shown above.