CPLD VHDL intro 1: Light a LED
From DP
Contents |
Overview
This is a very simple tutorial to walk you through your first VHDL CPLD design and introduce the ISE Webpack tools.
We only have one goal for this demo: light a LED on the development board. Open the ISE project VHDL-CPLDIntro1LEDon in the XC9572XL or XC2C64A folder.
LED D1 | LED D2 |
---|---|
ON | OFF |
Schematic
The XC2C64A and XC9572XL development boards have two LEDs and a push button. We'll light LED D1 in this demo.
IO | pin connection |
---|---|
LED D1 | P39 |
LED D2 | P38 |
Button PB | P18 |
To turn on LED D1 we need to connect pin 39 (P39) to the power supply inside the CPLD. We'll do this with a simple VHDL example.
VHDL
library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity light_LED is Port ( LED : out STD_LOGIC:='0'); end light_LED; architecture Behavioral of light_LED is begin LED <= '1'; end Behavioral;
The source of CPLDintro1LEDon.v is shown above.
Assign pin numbers in UCF
#PIN MAP OF DANGEROUSPROTOTYPES.COM CPLD BREAKOUT BOARDS #LICENSE: CC-0 (CREATIVE COMMONS 0) NET "LED" LOC = "P39"; NET "LED_INV" LOC = "P38";
Input and output names in the module are mapped to actual CPLD pin numbers in the UCF file. This is an example UCF file that defines the LED connection on the development boards.
- The Pxx numbers are the actual pin number on the CPLD. Set the LOC (location) of the LED marker to P39. Easy.
- ISE has a GUI utility to assign pin numbers, but it doesn't work with CoolRunner-II CPLDs.
We mapped the LED output marker to pin 39, which is attached to LED D1 on the development boards.
Export a JTAG programming file
Most CPLDs are programmed through a 4-wire JTAG interface. ISE programs CPLDs via the IMPACT utility, listed on the design panel as shown.
Only parallel cables and Xilinx USB cables can be used directly from IMPACT. We can also export generic JTAG programming files called (X)SVF. These files can be loaded with an external (X)SVF player utility and output through any JTAG programmer such as the Bus Pirate or Bus Blaster.
- See how to Export (X)SVF from Xilinx ISE Webpack
Program the CPLD
With (X)SVF programming files in hand we're ready to program the CPLD.
Just about any JTAG programmer with an (X)SVF player can now be used to program the CPLD. Here's some examples with our own programmers: